TAS5701

SLOS559A – JUNE 2008 – REVISED AUGUST 2010

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THERMAL INFORMATION

TAS5701

UNITS

PAP (64 PINS)

Junction-to-ambient thermal resistance

27.2

Junction-to-case (top) thermal resistance

16

Junction-to-board thermal resistance

13

°C/W

Junction-to-top characterization parameter

0.1

Junction-to-board characterization parameter

7.9

Junction-to-case (bottom) thermal resistance

0.9

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

Gate drive supply voltage

GVDD, VDD

10.8

12

13.2

V

Output bridge supply voltage

PVDD

0

21

V

Digita supply voltage

DVDD

3

3.3

3.6

V

Analog supply voltage

AVDD

3

3.3

3.6

V

High-level input voltage

3.3-V TTL, 5-V tolerant

2

V

Low-level input voltage

3.3-V TTL, 5-V tolerant

0.8

V

Operating ambient temperature range

0

85

°C

Operating junction temperature range

0

150

°C

6.0

8

Load impedance

Output filter: L = 22 mH, C = 680 nF.

3.2

4

Ω

3.2

4

10

Minimum output inductance under

Output-filter inductance

10

mH

short-circuit condition

10

PWM OPERATION AT RECOMMENDED OPERATING CONDITIONS

PARAMETER

TEST CONDITIONS

MODE

VALUE

UNIT

32–kHz data rate ±2%

12× sample rate

384

kHz

Output sample rate 2×–1×

44.1-, 88.2-, 176.4-kHz data rate ±2%

8×, 4×, and 2× sample rates

352.8

kHz

oversampled

48-, 96-, 192-kHz data rate ±2%

8×, 4×, and 2× sample rates

384

kHz

PLL INPUT PARAMETERS AND EXTERNAL FILTER COMPONENTS

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

4.9

49.2

MHz

MCLK duty cycle

40%

50%

60%

≥2-V MCLK = 49.152 MHz, within the

MCLK minimum high time

8

ns

min and max duty cycle constraints

≤0.8-V MCLK = 49.152 MHz, within the

MCLK minimum low time

8

ns

min and max duty cycle constraints

LRCLK allowable drift before LRCLK reset

4

MCLKs

External PLL filter capacitor C1

SMD 0603 Y5V

47

nF

External PLL filter capacitor C2

SMD 0603 Y5V

4.7

nF

External PLL filter resistor R

SMD 0603, metal film

470

Ω

8

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