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RT8129A Datasheet(PDF) 13 Page - Richtek Technology Corporation

Part # RT8129A
Description  High Efficiency Single Synchronous Buck PWM Controller
PDF  18 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT8129A Datasheet(HTML) 13 Page - Richtek Technology Corporation

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RT8129A
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS8129A-01
October
2015
www.richtek.com
13
Application Information
The RT8129A is a single-phase synchronous buck
PWM controller with integrated drivers which is
optimized for high performance graphic microprocessor
and computer applications. A COT (Constant-On-Time)
PWM controller and two MOSFET drivers with internal
bootstrap diodes are integrated so that the external
circuit is easily designed and the component count is
reduced.
The topology solves the poor load transient timing
problems of fixed-frequency current-mode PWM and
avoids
the
problems
caused
by
widely
varying
switching frequencies in conventional constant-on-time
and constant off-time PWM schemes.
RT8129A also features complete fault protection
functions including OVP, UVP and Current Limit.
PWM Operation
The RT8129A integrates a Constant-On-Time PWM
controller, and the controller provides the PWM signal
which relies on the FB voltage comparing with internal
reference voltage as shown in Figure 1. Referring to
the function block diagram of TON generator, the
synchronous UGATE driver will be turned on at the
beginning of each cycle. After the internal one-shot
timer expires, the UGATE driver will be turned off. The
pulse width of this one shot is determined by the
converter's input voltage and the output voltage to keep
the frequency fairly constant over the input voltage
range. Another one-shot sets a minimum off-time.
VFB
t
tON
VPEAK
VFB
VVALLEY
VREF
Figure 1. Constant On-Time PWM Control
Diode-Emulation Mode
In diode-emulation mode, the RT8129A automatically
reduces switching frequency at light-load conditions to
maintain
high
efficiency.
As
the
output
current
decreases from heavy-load condition, the inductor
current is also reduced, and eventually comes to the
point that its valley touches zero current, which is the
boundary
between
continuous
conduction
and
discontinuous conduction modes. By emulating the
behavior of diodes, the low-side MOSFET allows only
partial
of
negative
current
when
the
inductor
freewheeling current reach negative level. As the load
current is further decreased, it takes longer and longer
to discharge the output capacitor to the level that
requires the next “ON” cycle. In reverse, when the
output current increases from light load to heavy load,
the switching frequency increases to the preset value
as the inductor current reaches the continuous
condition.
The switching waveforms may appear noisy and
asynchronous
when
light
loading
causes
diode-emulation operation,
but this is a normal
operating condition that results in high light-load
efficiency. Trade-offs in DEM noise vs. light-load
efficiency is made by varying the inductor value.
Generally, low inductor values produce a broader
efficiency vs. load curve, while higher values result in
higher full-load efficiency (assuming that the coil
resistance remains fixed) and less output voltage ripple.
The disadvantages for using higher inductor values
include larger physical size and degrade load-transient
response (especially at low input-voltage levels).
Enable and Disable
The EN pin allows for power sequencing between the
controller bias voltage and another voltage rail. The
RT8129A remains in shutdown if the EN pin is lower
than 800mV. When EN pin rises above the 2V, the
RT8129A will begin a new initialization and soft-start
cycle.
Power-On Reset (POR), UVLO
Power-on reset (POR) occurs when VCC rises above
to approximately 4.4V (typical), the RT8129A will reset
the fault latch and preparing the PWM for operation.
Below 4V (typical), the VCC under voltage-lockout
(UVLO) circuitry inhibits switching by keeping UGATE
and LGATE low.



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