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IC-PR Datasheet(PDF) 13 Page - IC-Haus GmbH

Part # IC-PR
Description  REFLECTIVE OPTO ENCODERS
PDF  18 Pages
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Manufacturer  ICHAUS [IC-Haus GmbH]
Direct Link  http://www.ichaus.biz
Logo ICHAUS - IC-Haus GmbH

IC-PR Datasheet(HTML) 13 Page - IC-Haus GmbH

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iC-PR Series
REFLECTIVE OPTO ENCODERS
Rev A3, Page 13/18
An overview of the digital modes (interpolation and in-
dex gating) is depicted in Figure 8. The index gating
can be controlled via tri-level pin TZ, as defined by
Table 5.
Note: Static pin voltage at TZ is required during opera-
tion.
TZ
Description
low
B-gated index (180°)
high
Ungated index (360°)
open
AB-gated index (90°)
Table 5: Index gating controlled by pin TZ.
For correct functionality of the Z-index, programming
pin VZ has to be set to a proper value as described in
section INDEX DETECTION THRESHOLD.
DIGITAL HYSTERESIS
In all interpolation modes the iC-PR series features a
digital angular hysteresis of 360°
64·CPR , i.e. 1 LSB of the an-
gular resolution in mode DX16. As illustrated in Figure
9, the digital hysteresis corresponds to a slip existing
between the two rotating directions. In this way multiple
switching of the incremental signals at the reversing
point of a changing direction of rotation is prevented.
A+
B+
0°
28.125°/CPR
22.5°/CPR
Z+
0°
0°
code disc
angle
5.625°/CPR
digital hysteresis
Figure 9: Digital hysteresis in mode DX16 with AB-
gated index.
EDGE DISTANCE CONTROL
With the tri-level input pin EDC a minimal edge distance
of 80 ns, 1 µs or 10 µs (typical values) can be config-
ured to suit the system on hand (cable length, external
counter). It is recommended to set EDC low.
Note: Static pin voltage at EDC is required during oper-
ation.
EDC
Description
low
80 ns minimal edge distance
high
10 µs minimal edge distance
open
1 µs minimal edge distance
Table 6: Minimal edge distance controlled by pin EDC.
STARTUP BEHAVIOR
When iC-PR is powered on, the digital outputs are held
in a defined state:
PA = NA = PB = NB = low
PZ = NZ = high
This specific combination of output signal levels is in-
valid during normal operation, hence signalizing that
the iC is in the startup phase. Once the logic has found
and verified the code disc position, valid A/B/Z signals
are then output henceforth.
Note: iC-PR will also enter or remain in the startup
state, when the regulated LED current exceeds a spe-
cific value, e.g. due to code disc misalignment. Once
the LED current returns to a valid range, the logic will
again search for the code disc position and output valid
A/B/Z signals afterwards.



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