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P89LPC925FDH Datasheet(PDF) 49 Page - NXP Semiconductors

Part # P89LPC925FDH
Description  8-bit microcontrollers with accelerated two-clock 80C51 core 4 kB/8 kB 3 V low-power Flash with 8-bit A/D converter
PDF  49 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

P89LPC925FDH Datasheet(HTML) 49 Page - NXP Semiconductors

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© Koninklijke Philips Electronics N.V. 2004.
Printed in the U.S.A.
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 15 December 2004
Document order number: 9397 750 14471
Contents
Philips Semiconductors
P89LPC924/925
8-bit microcontrollers with accelerated two-clock 80C51 core
1
General description . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.1
Principal features . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.2
Additional features . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3.1
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5
Pinning information. . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5.1
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
6
Logic symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7
Special function registers. . . . . . . . . . . . . . . . . . . . . . 9
8
Functional description . . . . . . . . . . . . . . . . . . . . . . . 14
8.1
Enhanced CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8.2
Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8.2.1
Clock definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8.2.2
CPU clock (OSCCLK) . . . . . . . . . . . . . . . . . . . . . . . 14
8.2.3
Low speed oscillator option . . . . . . . . . . . . . . . . . . . 14
8.2.4
Medium speed oscillator option . . . . . . . . . . . . . . . . 14
8.2.5
High speed oscillator option . . . . . . . . . . . . . . . . . . . 14
8.2.6
Clock output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8.3
On-chip RC oscillator option . . . . . . . . . . . . . . . . . . 15
8.4
Watchdog oscillator option . . . . . . . . . . . . . . . . . . . . 15
8.5
External clock input option . . . . . . . . . . . . . . . . . . . . 15
8.6
CPU Clock (CCLK) wake-up delay. . . . . . . . . . . . . . 17
8.7
CPU Clock (CCLK) modification: DIVM register . . . 17
8.8
Low power select . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
8.9
A/D converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8.9.1
General description . . . . . . . . . . . . . . . . . . . . . . . . . 18
8.9.2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8.9.3
A/D operating modes . . . . . . . . . . . . . . . . . . . . . . . . 19
8.9.4
Conversion start modes . . . . . . . . . . . . . . . . . . . . . . 20
8.9.5
Boundary limits interrupt . . . . . . . . . . . . . . . . . . . . . 21
8.9.6
DAC output to a port pin with high output impedance 21
8.9.7
Clock divider. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
8.9.8
Power-down and idle mode . . . . . . . . . . . . . . . . . . . 21
8.10
Memory organization . . . . . . . . . . . . . . . . . . . . . . . . 21
8.11
Data RAM arrangement . . . . . . . . . . . . . . . . . . . . . . 22
8.12
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8.12.1
External interrupt inputs . . . . . . . . . . . . . . . . . . . . . . 22
8.13
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8.13.1
Port configurations . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.13.2
Quasi-bidirectional output configuration. . . . . . . . . . 24
8.13.3
Open-drain output configuration. . . . . . . . . . . . . . . . 24
8.13.4
Input-only configuration . . . . . . . . . . . . . . . . . . . . . . 24
8.13.5
Push-pull output configuration . . . . . . . . . . . . . . . . . 24
8.13.6
Port 0 analog functions . . . . . . . . . . . . . . . . . . . . . . 24
8.13.7
Additional port features . . . . . . . . . . . . . . . . . . . . . . 25
8.14
Power monitoring functions . . . . . . . . . . . . . . . . . . . 25
8.14.1
Brownout detection . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.14.2
Power-on detection . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.15
Power reduction modes . . . . . . . . . . . . . . . . . . . . . . 26
8.15.1
Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.15.2
Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.15.3
Total Power-down mode . . . . . . . . . . . . . . . . . . . . . . 26
8.16
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.16.1
Reset vector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.17
Timers/counters 0 and 1 . . . . . . . . . . . . . . . . . . . . . . 27
8.17.1
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.17.2
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.17.3
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.17.4
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.17.5
Mode 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.17.6
Timer overflow toggle output. . . . . . . . . . . . . . . . . . . 28
8.18
Real-Time clock/system timer. . . . . . . . . . . . . . . . . . 28
8.19
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.19.1
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.19.2
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.19.3
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.19.4
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.19.5
Baud rate generator and selection . . . . . . . . . . . . . . 29
8.19.6
Framing error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.19.7
Break detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.19.8
Double buffering . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.19.9
Transmit interrupts with double buffering
enabled (Modes 1, 2 and 3) . . . . . . . . . . . . . . . . . . . 30
8.19.10
The 9th bit (bit 8) in double buffering (Modes 1, 2 and
3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.20
I2C-bus serial interface . . . . . . . . . . . . . . . . . . . . . . . 31
8.21
Analog comparators . . . . . . . . . . . . . . . . . . . . . . . . . 33
8.21.1
Internal reference voltage . . . . . . . . . . . . . . . . . . . . . 33
8.21.2
Comparator interrupt. . . . . . . . . . . . . . . . . . . . . . . . . 34
8.21.3
Comparators and power reduction modes . . . . . . . . 34
8.22
Keypad interrupt (KBI) . . . . . . . . . . . . . . . . . . . . . . . 34
8.23
Watchdog timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.24
Additional features . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.24.1
Software reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.24.2
Dual data pointers. . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.25
Flash program memory. . . . . . . . . . . . . . . . . . . . . . . 36
8.25.1
General description. . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.25.2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.25.3
ISP and IAP capabilities of the P89LPC924/925 . . . 36
8.26
User configuration bytes . . . . . . . . . . . . . . . . . . . . . . 38
8.27
User sector security bytes . . . . . . . . . . . . . . . . . . . . 38
9
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
10
Static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 40
11
Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . 42
12
Comparator electrical characteristics . . . . . . . . . . . 45
13
A/D converter electrical characteristics . . . . . . . . . . 45
14
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
16
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
17
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
18
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
19
Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48



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