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P87LPC761 Datasheet(PDF) 16 Page - NXP Semiconductors

Part # P87LPC761
Description  Low power, low price, low pin count (16 pin) microcontroller with 2 kbyte OTP
PDF  58 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

P87LPC761 Datasheet(HTML) 16 Page - NXP Semiconductors

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Philips Semiconductors
Preliminary data
P87LPC761
Low power, low price, low pin count (16 pin)
microcontroller with 2 kbyte OTP
2002 Mar 07
13
BIT
SYMBOL
FUNCTION
I2CON.7
RDAT
Read: the most recently received data bit.
“
CXA
Write: clears the transmit active flag.
I2CON.6
ATN
Read: ATN = 1 if any of the flags DRDY, ARL, STR, or STP = 1.
“
IDLE
Write: in the I2C slave mode, writing a 1 to this bit causes the I2C hardware to ignore the bus until it
is needed again.
I2CON.5
DRDY
Read: Data Ready flag, set when there is a rising edge on SCL.
“
CDR
Write: writing a 1 to this bit clears the DRDY flag.
I2CON.4
ARL
Read: Arbitration Loss flag, set when arbitration is lost while in the transmit mode.
“
CARL
Write: writing a 1 to this bit clears the CARL flag.
I2CON.3
STR
Read: Start flag, set when a start condition is detected at a master or non-idle slave.
“
CSTR
Write: writing a 1 to this bit clears the STR flag.
I2CON.2
STP
Read: Stop flag, set when a stop condition is detected at a master or non-idle slave.
“
CSTP
Write: writing a 1 to this bit clears the STP flag.
I2CON.1
MASTER
Read: indicates whether this device is currently as bus master.
“
XSTR
Write: writing a 1 to this bit causes a repeated start condition to be generated.
I2CON.0
—
Read: undefined.
“
XSTP
Write: writing a 1 to this bit causes a stop condition to be generated.
—
SU01155
MASTER
STP
STR
ARL
DRDY
ATN
RDAT
0
1
2
3
4
5
6
7
I2CON
Reset Value: 81h
Bit Addressable1
Address: D8h
XSTP
XSTR
CSTP
CSTR
CARL
CDR
IDLE
CXA
READ
WRITE
Figure 6. I2C Control Register (I2CON)
BIT
SYMBOL
FUNCTION
I2DAT.7
RDAT
Read: the most recently received data bit, captured from SDA at every rising edge of SCL. Reading
I2DAT also clears DRDY and the Transmit Active state.
“
XDAT
Write: sets the data for the next transmitted bit. Writing I2DAT also clears DRDY and sets the
Transmit Active state.
I2DAT.6–0
–
Unused.
—
SU01156
—
—
—
—
—
—
RDAT
0
1
2
3
4
5
6
7
I2DAT
Reset Value: xxh
Not Bit Addressable
Address: D9h
—
—
—
—
—
—
—
XDAT
READ
WRITE
Figure 7. I2C Data Register (I2DAT)



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