1 Features
• LP-HCSL clock buffer and clock MUX that support:
– PCIe Gen 1 to Gen 7
– CC (Common Clock) and IR (Independent
Reference) PCIe architectures
– Input clock with or without SSC
• Intel DB2000QL and DB1206 compliant:
– All devices meet DB2000QL specifications
– LMKDB1120 is pin-compatible to DB2000QL
– LMKDB1112 is pin-compatible to DB1206
• Extremely low additive jitter:
– 31fs maximum 12kHz to 20MHz RMS additive
jitter at 156.25MHz
– 13fs maximum additive jitter for PCIe Gen 4
– 5fs maximum additive jitter for PCIe Gen 5
– 3fs maximum additive jitter for PCIe Gen 6
– 2.1fs maximum additive jitter for PCIe Gen 7
• Fail-safe input
• Fail-safe outputs (LMKDB1120FS, LMKDB1108FS
and LMKDB1104FS only)
• Flexible power-up sequence
• Automatic output disable
• Individual output enable
• SBI (Side Band Interface) for high-speed output
enable or disable
• LOS (Loss of Signal) input detection
• 85Ω or 100Ω output impedance
• 1.8V / 3.3V ± 10% power supply
• –40°C to 105°C ambient temperature

2 Applications
• High Performance Computing
• Server Motherboard
• NIC/SmartNIC
• Hardware Accelerator

3 Description
The LMKDB devices are a family of extremely-lowjitter
LP-HCSL buffers that support PCIe Gen 1 to
Gen 7 and are DB2000QL compliant. The devices
provide flexible power-up sequence, fail-safe inputs,
fail-safe outputs, individual output active and inactive
pins, loss of input signal (LOS) detection and
automatic output disable features, as well as excellent
power supply noise rejection performance.
Both 1.8V and 3.3V supply voltages are supported.
For LMKDB1120, 1.8V power supply saves 250mW
power compared to 3.3V.