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HT67F5652 Datasheet(PDF) 83 Page - Holtek Semiconductor Inc |
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HT67F5652 Datasheet(HTML) 83 Page - Holtek Semiconductor Inc |
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83 / 224 page  Rev. 1.00 8� De�e��e� 0�� �01� Rev. 1.00 83 De�e��e� 0�� �01� HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU Bit3 TnOC:TPn_0,TPn_1Outputcontrolbit CompareMatchOutputMode 0:Initiallow 1:Initialhigh PWMOutputMode 0:Activelow 1:Activehigh ThisistheoutputcontrolbitfortheTMoutputpin.Itsoperationdependsupon whetherTMisbeingusedintheCompareMatchOutputModeorinthePWMOutput Mode.IthasnoeffectiftheTMisintheTimer/CounterMode.IntheCompareMatch OutputModeitdeterminesthelogicleveloftheTMoutputpinbeforeacompare matchoccurs.InthePWMOutputModeitdeterminesifthePWMsignalisactive highoractivelow. Bit2 TnPOL:TPn_0,TPn_1OutputpolarityControl 0:Non-invert 1:Invert ThisbitcontrolsthepolarityoftheTPn_0orTPn_1outputpin.Whenthebitisset hightheTMoutputpinwillbeinvertedandnotinvertedwhenthebitiszero.Ithasno effectiftheTMisintheTimer/CounterMode. Bit1 TnDPX:TMnPWMperiod/dutyControl 0:CCRP-period;CCRA-duty 1:CCRP-duty;CCRA-period Thisbit,determineswhichoftheCCRAandCCRPregistersareusedforperiodand dutycontrolofthePWMwaveform. Bit0 TnCCLR:SelectTMnCounterclearcondition 0:TMnComparatorPmatch 1:TMnComparatorAmatch Thisbitisusedtoselectthemethodwhichclearsthecounter.Rememberthatthe CompactTMcontainstwocomparators,ComparatorAandComparatorP,eitherof whichcanbeselectedtocleartheinternalcounter.WiththeTnCCLRbitsethigh, thecounterwillbeclearedwhenacomparematchoccursfromtheComparatorA. Whenthebitislow,thecounterwillbeclearedwhenacomparematchoccursfrom theComparatorPorwithacounteroverflow.Acounteroverflowclearingmethodcan onlybeimplementediftheCCRPbitsareallclearedtozero.TheTnCCLRbitisnot usedinthePWMOutputMode. • TMnDL Register (n=0) Bit 7 6 5 4 3 2 1 0 Na�e D� D� D5 D4 D3 D� D1 D0 R/W R R R R R R R R POR 0 0 0 0 0 0 0 0 Bit7~0 D7~D0:TMnCounterLowByteRegisterbit7~bit0 TMn10-bitCounterbit7~bit0 • TMnDH Register (n=0) Bit 7 6 5 4 3 2 1 0 Na�e — — — — — — D9 D8 R/W — — — — — — R R POR — — — — — — 0 0 Bit7~2 Unimplemented,readas"0" Bit1~0 D9~D8:TMnCounterHighByteRegisterbit1~bit0 TMn10-bitCounterbit9~bit8 |
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