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Document Number: 72718

S-

61692–Rev. E, 04-Sep-06

Vishay Siliconix

SiP41103

TIMING WAVEFORMS

PIN CONFIGURATION AND TRUTH TABLE

Note:

a. After the device is enabled.

PWM

10 %

90 %

50 %

90 %

10 %

10 %

10 %

50 %

90 %

90 %

1 V

LX

2

3

4

10

9

8

7

BOOT

PWM

DELAY

LX

NC

Top View

5

GND

6

MLP33

PWM

LL

L

L

LH

L

H

HX

H

L

ORDERING INFORMATION

Standard Part Number

Lead (Pb)-Free Part Number

Temperature Range

Marking

SiP41103DM-T1

SiP41103DM-T1-E3

- 40 to 85 °C

41A3

Eval Kit

Temperature Range

SiP41103DB

- 40 to 85 °C

PIN DESCRIPTION

Pin Number

Name

Function

1

High-side MOSFET gate drive

2

BOOT

Bootstrap supply for high-side driver. A capacitor connects between BOOT and LX

3

PWM

Input signal for the MOSFET drivers

4

DELAY

Connection for the highside dealy adjustment capacitors

5

GND

Ground

6

Synchronous or low-side MOSFET gate drive

7

+ 5 V supply

8

NC

No Connect

9

10

LX

Connection for source of high-side MOSFET, drain of the low-side MOSFET and the inductor