SIP41103DM datasheet(5/8 Pages) VISHAY

5 / 8 page

Document Number: 72718

S-

61692–Rev. E, 04-Sep-06

www.vishay.com

Vishay Siliconix

SiP41103

FUNCTIONAL BLOCK DIAGRAM

DETAILED OPERATION

PWM

The PWM pin controls the switching of the external

MOSFETs. The driver logic operates in a noninverting

configuration. The PWM input stage should be driven

by a signal with fast transition times, like those pro-

vided by a PWM controller or logic gate, (< 200 ns).

The PWM input functions as a logic input and is not

intended for applications where a slow changing input

voltage is used to generate a switching output when

the input switching threshold voltage is reached.

Enable

The device is enabled by edge sensing of transitions

on PWM, high or low. A minimum PWM frequency of

2 kHz is required to keep the device enabled. When

continuous PWM transitions are present, and after

power-on reset time has elapsed, OUTH and OUTL will

become active.

Low-Side Driver

The supplies for the low-side driver are VDD and GND.

During shutdown, OUTL is held low.

High-Side Driver

The high-side driver is isolated from the substrate to

create a floating high-side driver so that an N-Channel

MOSFET can be used for the high-side switch. The

supplies for the high-side driver are BOOT and LX.

The voltage is supplied by a floating bootstrap capaci-

tor, which is continually recharged by the switching

action of the output. During shutdown OUTH is held

low.

Bootstrap Circuit

The internal bootstrap diode and a bootstrap capacitor

form a charge pump that supplies voltage to the BOOT

pin. An integrated bootstrap diode replaces the exter-

nal Schottky diode and bootstrap only a capacitor is

necessary to complete the circuit. The bootstrap

capacitor is sized according to.

where QGATE is the gate charge needed to turn on the

high-side MOSFET and

ΔV

BOOT-LX is the amount of

droop allowed in the bootstrap supply voltage when

the high-side MOSFET is driven high. The bootstrap

capacitor value is typically 0.1 µF to 1 µF. The boot-

strap capacitor voltage rating must be greater than

VDD + 5 V to withstand transient spikes and ringing.

Shoot-Through Protection

The external MOSFETs are prevented from conduct-

ing at the same time during transitions. Break-before-

make circuits monitor the voltages on the LX pin and

the OUTL pin and control the switching as follows:

When the signal on PWM goes low, OUTH will go low

after an internal propagation delay. After the voltage

Figure 1.

PWM

GND

VDD

OUTH

OUTL

OTP

VDD

BOOT

VBBM

−

UVLO

DELAY

ENSYNC

DELAY

CBOOT = (QGate/ΔVBOOT- LX) x 10

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