MP9943A – 36V, 3A PEAK SYNCHRONOUS STEP-DOWN CONVERTER

MP9943A Rev. 1.1

www.MonolithicPower.com

12

9/1/2017

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OPERATION

The MP9943A is a high-frequency, synchronous,

rectified, step-down, switch-mode converter with

built-in power MOSFETs. It offers a very compact

solution to achieve 3A peak output current with

excellent load and line regulation over a wide

input supply range.

When MP9943A operates in a fixed-frequency,

peak-current–control mode to regulate the output

voltage. An internal clock initiates a PWM cycle.

The integrated high-side power MOSFET turns

on and remains on until its current reaches the

value set by the COMP voltage. When the power

switch is off, it remains off until the next clock

cycle starts. If the current in the power MOSFET

does not reach the current value set by COMP

within 95% of one PWM period, the power

MOSFET will be forced to turn off.

Internal Regulator

The 5V internal regulator power most of the

internal circuitries. This regulator is supplied by

5.0V, the output of the regulator decreases

following the VIN. A 0.1uF decoupling ceramic

capacitor is needed at the pin.

Error Amplifier

The error amplifier compares the FB pin voltage

against the internal 0.792V reference (REF) and

outputs a COMP voltage—this COMP voltage

controls the power MOSFET current. The

optimized

internal

compensation

network

minimizes the external component count and

simplifies the control loop design.

Enable/SYNC control

EN/SYNC is a digital control pin that turns the

regulator on and off: Drive EN/SYNC high to turn

on the regulator, drive it low to turn it off. An

internal 500kΩ resistor from EN/SYNC to GND

allows EN/SYNC to be floated to shut down the

chip.

The EN/SYNC pin is clamped internally using a

6.5V series Zener diode, as shown in Figure 2.

Connect the EN/SYNC input pin through a pullup

the pullup resistor limits the EN/SYNC input

current to less than 150µA.

≥ (12V – 6.5V) ÷ 150µA = 36.7kΩ.

Connecting the EN/SYNC pin directly to a

voltage source without any pullup resistor

requires limiting voltage amplitude to ≤6V to

prevent damage to the Zener diode.

Figure 2: 6.5V-Type Zener Diode

Connect an external clock with a range of

200kHz to 2.2MHz 2ms after output voltage is set

to synchronize the internal clock rising edge to

the external clock rising edge. The pulse width of

external clock signal should be less than 2μs.

Under-Voltage Lockout

Under-voltage lockout (UVLO) protects the chip

from operating at an insufficient supply voltage.

The MP9943A UVLO comparator monitors the

output voltage of the internal regulator, VCC. The

UVLO rising threshold is about 3.5V while its

falling threshold is 3.3V.

Internal Soft-Start

The soft-start prevents the converter output

voltage from overshooting during startup. When

the chip starts, the internal circuitry generates a

soft-start voltage (SS) that ramps up from 0V to

1.2V. When SS is lower than REF, SS overrides

REF so the error amplifier uses SS as the

reference. When SS exceeds REF, the error

amplifier uses REF as the reference. The SS

time is internally set to 1.5ms.

Over-Current Protection and Hiccup

The MP9943A has cycle-by-cycle over current

limit when the inductor current peak value

exceeds the set current limit threshold. If the

output voltage starts to drop until FB is below the

Under-Voltage (UV) threshold—typically 84%

below the reference—the MP9943A enters

hiccup mode to periodically restart the part. This

protection mode is especially useful when the

output is dead-shorted to ground. The average

short-circuit current is greatly reduced to alleviate

the thermal issue and to protect the regulator.