MP9943A datasheet(13/19 Pages) MPS

13 / 19 page

MP9943A – 36V, 3A PEAK SYNCHRONOUS STEP-DOWN CONVERTER

MP9943A Rev. 1.1

www.MonolithicPower.com

9/1/2017

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

The MP9943A exits the hiccup mode once the

over-current condition is removed.

Thermal Shutdown

Thermal shutdown prevents the chip from

operating at exceedingly high temperatures.

When the silicon die temperature exceeds 170°C,

it shuts down the whole chip. When the

temperature drops below its lower threshold

(typically 140°C) the chip is enabled again.

Floating Driver and Bootstrap Charging

An external bootstrap capacitor power the

floating-power-MOSFET

driver.

dedicated

internal regulator (see Figure 3) charges and

regulates the bootstrap capacitor voltage to ~5V.

When the voltage between the BST and SW

nodes drops below regulation, a PMOS pass

transistor connected from VIN to BST turns on.

The charging current path is from VIN, BST and

then to SW. The external circuit should provide

enough voltage headroom to facilitate charging.

As long as VIN is significantly higher than SW, the

bootstrap capacitor remains charged. When the

HS-FET is on, VIN ≈ VSW, so the bootstrap

capacitor can’t be charged. When the LS-FET is

on, VIN−VSW reaches its maximum for fast

charging. When there is no inductor current,

VSW=VOUT, so the difference between VIN and

VOUT can charge the bootstrap capacitor. The

floating driver has its own UVLO protection, with

a rising threshold of 2.2V and hysteresis of

150mV. A 20Ω resistor placed between SW and

BST cap is strongly recommended to reduce SW

spike voltage.

Figure 3: Internal Bootstrap Charging Circuit

Startup and Shutdown

If both VIN and VEN/SYNC exceed their appropriate

thresholds, the chip starts: The reference block

starts first, generating stable reference voltage

and currents, and then the internal regulator is

enabled. The regulator provides stable supply for

the remaining circuitries.

Three events can shut down the chip: VEN/SYNC

low, VIN low, and thermal shutdown. In the

shutdown procedure, the signaling path is first

blocked to avoid any fault triggering. The COMP

voltage and the internal supply rail are then

pulled down. The floating driver is not subject to

this shutdown command.

Power Good

The MP9943A has power good (PG) output. The

PG pin is the open drain of a MOSFET. It should

be connected to VCC or some other voltage

source through a resistor (e.g. 100kΩ). In the

presence of an input voltage, the MOSFET turns

on so that the PG pin is pulled to low before SS

is ready. After VFB reaches 90%×REF, the PG pin

is pulled high after a delay, typically 90μs. When

VFB drops to 84%×REF, the PG pin is pulled low.

Also, PG is pulled low if thermal shutdown or

EN/SYNC is pulled low.

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