SAFC161RI datasheet(12/60 Pages) SIEMENS

12 / 60 page

Semiconductor Group

1998-05-01

C161RI

Memory Organization

The memory space of the C161RI is configured in a Von Neumann architecture which means that

code memory, data memory, registers and I/O ports are organized within the same linear address

space which includes 16 MBytes. The entire memory space can be accessed bytewise or

wordwise. Particular portions of the on-chip memory have additionally been made directly

bitaddressable.

1 KByte of on-chip Internal RAM is provided as a storage for user defined variables, for the system

stack, general purpose register banks and even for code. A register bank can consist of up to 16

wordwide (R0 to R15) and/or bytewide (RL0, RH0, …, RL7, RH7) so-called General Purpose

Registers (GPRs).

1024 bytes (2

× 512 bytes) of the address space are reserved for the Special Function Register

areas (SFR space and ESFR space). SFRs are wordwide registers which are used for controlling

and monitoring functions of the different on-chip units. Unused SFR addresses are reserved for

future members of the C166 family.

In order to meet the needs of designs where more memory is required than is provided on chip, up

to 8 MBytes of external RAM and/or ROM can be connected to the microcontroller.

SAFC161RI Datasheet(PDF) 12 Page - Siemens Semiconductor Group