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MP4050A Datasheet(PDF) 12 Page - Monolithic Power Systems |
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MP4050A Datasheet(HTML) 12 Page - Monolithic Power Systems |
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12 / 21 page ![]() MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE MP4050A Rev. 1.01 www.MonolithicPower.com 12 1/14/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. OPERATION The MP4050A is a non-isolated, cost-effective, high-efficiency converter designed to drive high- brightness LEDs from a universal AC grid input or DC input. As shown in the typical application diagram (see Fig. 1), the regulator is designed to operate with a minimum number of external components. Start-Up and Under-Voltage Lockout (UVLO) Initially, the chip is self-supplied by the internal high-voltage VCC regulator (which is drawn from DRAIN). The IC starts switching and the internal high-voltage regulator turns off as soon as the VCC reaches VCCOFF. When VCC drops below VCCON, the internal high-voltage regulator turns on again to charge the external VCC capacitor. Finally, VCC is regulated at VCCNOR for normal operation. A small capacitor with several μF capacitances is enough to hold on to the VCC supply voltage. Also, a smaller capacitor reduces component cost. When VCC drops below VCCSTOP, the IC stops working and the internal high-voltage regulator re-charges the VCC capacitor. When fault conditions occur (such as open LED protection or over-temperature protection), the MP4050A stops working, and an 18µA internal sink current source discharges the VCC capacitor. After VCC drops below VCCPRO, the internal high- voltage regulator recharges the VCC capacitor again. The re-start time can be calculated by the following equation, NOR PRO OFF PRO RESTART VCC VCC VCC VCC VCC VCC tC C 18 A 5mA Fig. 2 shows the typical waveforms with VCC under-voltage lockout. FIGURE 2. VCC Under-Voltage Lockout (UVLO) Constant-Current Operation The MP4050A is a fully integrated regulator. The internal feedback logic responds to the internal sample and hold circuit to achieve constant output-current regulation. The voltage of the internal sampling capacitor (VFB) is compared to the internal reference (VREF) when the sampling capacitor voltage (VFB) falls below the reference voltage (which indicates an insufficient output current). Then the integrated MOSFET is turned on. The on period is determined by the peak current limit. After the on period elapses, the integrated MOSFET is turned off (see Fig. 3). FIGURE 3. VFB vs. IOUT Thus, by monitoring the internal sampling capacitor voltage, the output current can be regulated. The output current is determined by the following equation: REF OUT S V I R The peak inductor current at normal operation can be obtained with the following equation: LIMIT PK S V I R Where RS is the sensing resistance connected from SOURCE to GND. |
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