ISL5216 datasheet(21/65 Pages) RENESAS

21 / 65 page

ISL5216

FN6013 Rev.3.00

Page 21 of 65

July 13, 2007

Reserved

Set to 0.

66:64

Coefficient Memory

Block Size

66:64

Memory Block Size

116

364

128

256

512

1024

(Modulo addressing can be used, but is usually not needed. If not needed this bit field can always be

set to 7).

75:67

Number of FIR

Outputs

Number of FIR outputs (range is 1 to 512, load w/ desired value minus 1).

This is usually equal to the total decimation that follows the filter.

84:76

Read Address

Pointer Step

Read address pointer step (for next run). This is usually equal to the filter decimation times the number

of outputs from the instruction.

93:85

Initial Address Offset Initial address offset (to ADDRB). This is the offset from the start address to other end of filter.

For symmetric filters, usually equal to -1 x (number of taps -1).

95:94

Reserved

Set to 0

104:96

Memory Reads Per

FIR Output

This is based on the number of taps (load with value below minus 1).

Type

Value

Symmetric, even number of taps

(taps/2) or floor((taps+1)/2).

Symmetric, odd number of taps

(taps+1)/2 or floor((taps+1)/2).

Decimating HBF

(taps+5)/4.

Asymmetric

taps.

Complex

taps .

Resampling

taps/phase (six taps per phase for the ROM’d coefficients provided).

Interpolating HBF

(taps+5)/4-1 .

106:105

Clocks Per

Memory Read

Set to 0 for all but complex FIR, which is set to 1.

115:107

Data Memory

Step Size 1

(ADDRA) Step size for all but the last tap computation of the FIR.

Set to -2 for HBF, -1 otherwise.

117:116

Data Memory

Step Size 2

(ADDRA) Step size for last tap computation. Set to -1.

117:116

Step size

-1

-2

step size value.

119:118

Data Memory

Address Offset Step

(ADDRB) Step size for opposite end of symmetric filter. Set to +2 for Decimating HBF, to +1 for others

(the B data is not used for asymmetric, resampling, and complex filters).

122:120

Coefficient Memory

Step Size

(ADDRC) Usually set to 1.

122:120

Step size

764

INSTRUCTION BIT FIELDS (Continued)

BIT

POSITIONS

FUNCTION

DESCRIPTION

ISL5216 Datasheet(PDF) 21 Page - Renesas Technology Corp

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