ISL8121IRZ datasheet(13/26 Pages) RENESAS

13 / 26 page

ISL8121

FN6352 Rev 2.00

Page 13 of 26

October 27, 2009

The differential amplifier can be used even if remote

output sensing is not desired or not feasible, simply

connect VSEN- to the local ground and connect VSEN+ to

the output voltage being monitored. Should one desire to

bypass the differential amplifier, the circuit in Figure 9 is

recommended as the proper implementation. Since its

output is monitored for OVP and PGD purposes, the

differential amplifier needs to be connected to the

feedback circuit at all times, hence its input connections

to FB and local ground. However, its output, VDIFF, can

be left open. The resistor divider setting the output

voltage is calculated in a manner identical to that already

revealed.

DIFFERENTIAL AMPLIFIER’S UNITY GAIN

NETWORK

The differential amplifier on the ISL8121 utilizes a typical

resistive network along with active compensating

circuitry to set its unity gain. This resistive network can

affect the DC regulation setpoint in proportion to its

relative magnitude compared to the external output

voltage setting resistor divider. Figure 10 details the

internal resistive network. For minimal impact on the

output voltage setting, follow the guidelines presented in

“Setting the Output Voltage” on page 12.

EXTERNAL REFERENCE OPERATION

The ISL8121 is capable of accepting an external voltage

and using it as a reference for its output regulation. To

enable this mode of operation, the VMON pin potential

has to be below 3.5V and the reference voltage has to be

connected to the REFTRK pin. The internal or external

reference mode of operation is latched in every time the

POR is released or the ISL8121 is enabled. The highest

magnitude external reference fed to the REFTRK pin that

the ISL8121 can follow is limited to 2.3V. The ISL8121

utilizes a small initial negative offset (typically about

50mV) in the voltage loop at the beginning of it soft-

start, to counteract any positive offsets that may have

undesirable effects. As this initial offset is phased out as

the reference is ramped up to around 200mV, in order to

avoid an error in the output regulation level, it is

recommended the external reference has an amplitude

(final, DC level) exceeding 300mV.

While in external reference (ER) mode, the threshold

sensitive VMON pin can be used to control when the

ISL8121 starts to monitor the output for PGD and OVP

protection purposes. As shown in Figure 11, connect the

VMON pin to the voltage to be monitored via a resistor

divider. An internal current source helps set a

user-adjustable monitor threshold hysteresis. Choose

resistor values according to desired hysteresis voltage,

VH, and desired rising threshold, VT.

Make note that, in Equation 9, VREF refers to the

reference of the VMON comparator (300mV).

Intersil recommends the VMON threshold is set to be

tripped when the external reference voltage reaches at

least 90% of the final DC value. Since PGD and OVP

monitoring are relative to the external reference

FIGURE 9. SETTING THE OUTPUT VOLTAGE AT THE

FB PIN

EXTERNAL CIRCUIT

ISL8121

VSEN+

VSEN-

DIFFERENTIAL

AMPLIFIER

TO VOUT

VREF

ERROR

AMPLIFIER

RS(R1)

VDIFF

FIGURE 10. SETTING THE OUTPUT VOLTAGE AT THE

INPUT OF THE DIFFERENTIAL AMPLIFIER

EXTERNAL

ISL8121

VSEN-

VSEN+

VDIFF

DIFFERENTIAL

AMPLIFIER

ZIN

CIRCUIT

~2µA

ZIN > 240k

OVER PROCESS, TEMPERATURE, AND

0 < (VSEN+)-(VSEN-) < 2.5V

FIGURE 11. SETTING THE MONITORING THRESHOLD

AND HYSTERESIS

EXTERNAL CIRCUIT

ISL8121

VMON

COMPARATOR

(300mV)

(10µA)

VCC

VREF

VDIFF

--------

RS VREF



VT VREF

–

----------------------------

(EQ. 9)

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