FN7486 Rev 3.00

Page 13 of 14

December 4, 2014

ISL55100A

Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted

in the quality certifications found at www.intersil.com/en/support/qualandreliability.html

Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such

modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are

current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its

subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

For additional products, see www.intersil.com/en/products.html

© Copyright Intersil Americas LLC 2005-2014. All Rights Reserved.

All trademarks and registered trademarks are the property of their respective owners.

About Intersil

Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products

address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.

For the most updated datasheet, application notes, related documentation and related parts, please see the respective product

information page found at www.intersil.com.

You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.

Reliability reports are also available from our website at www.intersil.com/support

FIGURE 19. FREQUENCY OF 10MHz = 50ns PATTERN RATE

FIGURE 20. MINIMUM PULSE WIDTH VH 6/8/10V

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that

you have the latest revision.

DATE

REVISION

CHANGE

December 4, 2014

FN7489.3

Update the datasheet throughout to Intersil’s new standard.

On page 2, updated the ordering information by adding MSL note.

On page 3, in “Pin Descriptions” table, added “This is also the potential of the exposed thermal pad on the

package bottom.” to the VEE row. Added “EP” row.

On page 4, under “Absolute Maximum Ratings”changed “DOUT” range from “VL – 0.5V” to “VEE - 0.5V”.

On page 9, changed a sentence in the 5th paragraph from “The maximum safe power temperature vs operating

frequency can be found graphically in Figure 18.” to “The junction temperature rise above ambient vs. operating

frequency can be found graphically in Figure 18.”

On page 9, edited “ESD Protection” paragraph.

On page 10, revised Figure 6 to represent actual ESD structures.

On page 12, changed the Y-axis label from “Temperature” to “Temperature Rise”.

Added Revision History and About Intersil sections.

0

0

20ns/DIV

0

10ns/DIV