TVP3025 datasheet(21/99 Pages) TI

21 / 99 page

2–7

2.3

Circuit Description Using TVP3025 Register Map

In general, the TVP3025 is a superset of the TVP3020, with several advanced features. These features and

other differences are discussed in the appropriate description sections and highlighted in Section 2.3.17.

2.3.1

MPU Interface-8/6 Operation

The 8/6 terminal is used to select between an 8- or 6-bit wide data path to the color palette RAM and is

provided in order to maintain compatibility with the IMSG176. If miscellaneous-control register bit 2 is set

to logic 1, then the 8/6 terminal is disabled and 8/6 operation is specified by bit 3 of the miscellaneous-control

2.3.2

Color Palette – Palette-Page Register

The TVP3020 mode of the device defines a palette-page register as an 8-bit register on the indexed register

map. When using 1, 2, or 4 bit planes in the pseudo color modes, the additional planes are provided from

the page register before the data addresses the color palette. This is illustrated in Table 2–4.

NOTE:

The additional bits from the page register are inserted after the read mask.

The palette-page register specifies the additional bit planes for the overlay field in

direct-color modes with less than 8 bits per pixel overlay.

This register should be set to 00 (hex) before reentering the BT485 mode if it has

been modified.

Table 2–4. Allocation of Palette-Page Register Bits

NUMBER OF BIT PLANES

MSB

PALETTE ADDRESS BITS

LSB

Pn = n bit from page register

M = bit from pixel port

2.3.3

Input Clock Selection

The TVP3025 VIP provides a maximum of four clock inputs. Two are dedicated as TTL inputs; the other two

can be selected as either one differential ECL input or two extra TTL inputs. The TTL inputs can be used

for video rates up to 140 MHz. The dual-mode clock input (ECL / TTL) is primarily an ECL input but can be

used as TTL-compatible inputs if the input-clock-selection register is so programmed. The clock source

used at power up is CLK0; an alternative source can be selected by software during normal operation. This

chosen clock input can be used unmodified as the dot clock (representing pixel rate to the monitor).

Alternatively, if the input-clock-selection register is programmed to use the internal frequency doubler, the

chosen clock source is used as a reference for multiplication.

The input-clock-selection register is used to select the desired input clock source. Table 2–5 details how to

program the various options.

TVP3025 Datasheet(PDF) 21 Page - Texas Instruments