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S71PL129JC0BAI9P2 Datasheet(PDF) 71 Page - SPANSION |
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S71PL129JC0BAI9P2 Datasheet(HTML) 71 Page - SPANSION |
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71 / 149 page  June 4, 2004 S29PL129J_MCP_00_A0 S29PL129J for MCP 71 Advance Informatio n Notes: 1. SA = sector address (for Sector Erase), VA = Valid Address for reading status data (see “Write Operation Status” on page 56 2. S29PL129J - During CE1# transitions, CE2# = VIH; During CE2# transitions, CE1# = VIH 3. S29PL129J - There are two CE# (CE1#, CE2#). In the above waveform CE# = CE1# or CE2# Figure 16. Chip/Sector Erase Operation Timings OE# CE# Addresses VCC WE# Data 2AAh SA tAH tWP tWC tAS tWPH 555h for chip erase 10 for Chip Erase 30h tDS tVCS tCS tDH 55h tCH Status DOUT tWHWH2 VA VA Erase Command Sequence (last two cycles) Read Status Data RY/BY# tRB tBUSY |
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