UPD780208 datasheet(64/472 Pages) NEC

64 / 472 page

Chapter 3

CPU Architecture

User’s Manual U16504EE1V1UD00

(3)

Stack pointer (SP)

This is a 16-bit register to hold the start address of the memory stack area. Only the internal high-

speed RAM area can be set as the stack area.

Figure 3-11:

Stack Pointer Configuration

The SP is decremented ahead of write (save) to the stack memory and is incremented after read

(reset) from the stack memory.

Each stack operation saves/resets data as shown in Figures 3-12 and 3-13.

Caution:

Since RESET input makes SP contents indeterminate, be sure to initialize the SP

before instruction execution.

Figure 3-12:

Data to be Saved to Stack Memory

Figure 3-13:

Data to be Reset to Stack Memory

Interrupt and

BRK Instruction

PSW

PC15 to PC8

PC7 to PC0

SP _ 2

CALL, CALLF, and

CALLT Instruction

PUSH rp Instruction

SP _ 1

SP _ 2

SP _ 1

PC7 to PC0

SP _ 3

SP _ 2

SP _ 1

SP _ 3

RETI and RETB

Instruction

PSW

PC15 to PC8

PC7 to PC0

SP + 2

RET Instruction

POP rp Instruction

SP + 1

PC7 to PC0

SP + 2

SP + 1

SP + 2

SP + 1

SP + 3

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