COP8-REF-AM datasheet(26/83 Pages) NSC

26 / 83 page

11.0 In-System Programming

(Continued)

TABLE 9. KEY Register Write Format

KEY When Writing

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Bits 7–2: Key value that must be written to set the KEY bit.

Bits 1–0: Don’t care.

11.5 FORCED EXECUTION FROM BOOT ROM

When the user is developing a customized ISP routine, code

lockups due to software errors may be encountered. The

normal, and preferred, method to recover from these condi-

tions is to reprogram the device with the corrected code by

either an external parallel programmer or the emulation

tools. As a last resort, when this equipment is not available,

there is a hardware method to get out of these lockups and

force execution from the Boot ROM MICROWIRE/PLUS

routine. The customer will then be able to erase the Flash

Memory code and start over.

The method to force this condition is to drive the G6 pin to

high voltage (2 x V

CC) and activate Reset. The high voltage

condition on G6 must not be applied before V

CC is valid and

stable, and must be held for at least 3 instruction cycles

longer than Reset is active. This special condition will by-

pass checking the state of the Flex bit in the Option Register

and will start execution from location 0000 in the Boot ROM.

In this state, the user can input the appropriate commands,

using MICROWIRE/PLUS, to erase the flash program

memory and reprogram it. If the device is subsequently reset

before the Flex bit has been erased by specific Page Erase

or Mass Erase ISP commands, execution will start from

location 0000 in the Flash program memory. The high volt-

age (2 x V

CC) on G6 will not erase either the Flex or the

Security bit in the Option Register. The Security bit, if set,

can only be erased by a Mass Erase of the entire contents of

the Flash Memory unless under the control of User ISP

routines in the Application Program.

While the G6 pin is at high voltage, the Load Clock will be

output onto G5, which will look like an SK clock to the

MICROWIRE/PLUS routine executing in slave mode. How-

ever, when G6 is at high voltage, the G6 input will also look

like a logic 1. The MICROWIRE/PLUS routine in Boot ROM

monitors the G6 input, waits for it to go low, debounces it,

and then enables the ISP routine. CAUTION: The Load clock

on G5 could be in conflict with the user’s external SK. It is up

to the user to resolve this conflict, as this condition is con-

sidered a minor issue that’s only encountered during soft-

ware development. The user should also be cautious of

the high voltage applied to the G6 pin. This high voltage

could damage other circuitry connected to the G6 pin

(e.g. the parallel port of a PC). The user may wish to

disconnect other circuitry while G6 is connected to the high

voltage.

CC must be valid and stable before high voltage is applied

to G6.

The correct sequence to be used to force execution from

Boot ROM is :

Disconnect G6 from the source of data for MICROWIRE/

PLUS ISP.

Apply V

CC to the device.

Pull RESET Low.

After V

CC is valid and stable, connect a voltage between

2xV

CC and VCC+7V to the G6 pin. Ensure that the rise

time of the high voltage on G6 is slower than the mini-

mum in the Electrical Specifications.Figure 13 shows a

possible circuit dliagram for implementing the2xV

CC.

Be aware of the typical input current on the G6 pin when

the high voltage is applied. The resistor used in the RC

network, and the high voltage used, should be chosen to

keep the high voltage at the G6 pin between2xV

CC and

CC+7V.

Pull RESET High.

After a delay of at least three instruction cycles, remove

the high voltage from G6.

11.6 RETURN TO FLASH MEMORY WITHOUT

HARDWARE RESET

After programming the entire program memory, including

options, it is necessary to exit the Boot ROM and return to

the flash program memory for program execution. Upon

receipt and completion of the EXIT command through the

MICROWIRE/PLUS ISP, the ISP code will reset the part and

begin execution from the flash program memory as de-

scribed in the Reset section. This assumes that the FLEX bit

in the Option register was programmed to 1.

11.7 MICROWIRE/PLUS ISP

National Semiconductor provides a program, which is avail-

able from our web site at www.national.com/cop8, that is

capable of programming a device from the parallel port of a

PC. The software accepts manually input commands and is

capable of downloading standard Intel HEX Format files.

Users who wish to write their own MICROWIRE/PLUS ISP

host software should refer to the COP8 FLASH ISP User

Manual, available from the same web site. This document

includes details of command format and delays necessary

between command bytes.

The MICROWIRE/PLUS ISP supports the following features

and commands:

•

Write a value to the ISP Write Timing Register. NOTE:

This

must

the

first

command

after

entering

MICROWIRE/PLUS ISP mode.

•

Erase the entire flash program memory (mass erase).

•

Erase a page at a specified address.

•

Read Option register.

•

Read a byte from a specified address.

•

Write a byte to a specified address.

•

Read multiple bytes starting at a specified address.

•

Write multiple bytes starting at a specified address.

•

Exit ISP and return execution to flash program memory.

20006366

FIGURE 13. Circuit Diagram for Implementing the 2 x

COP8-REF-AM Datasheet(PDF) 26 Page - National Semiconductor (TI)

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