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DSP56857 Datasheet(PDF) 408 Page - Freescale Semiconductor, Inc

Part # DSP56857
Description  Digitial Signal Controller
PDF  662 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

DSP56857 Datasheet(HTML) 408 Page - Freescale Semiconductor, Inc

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Module Memory Maps
5685X Digital Signal Controller User Manual, Rev. 4
15-8
Freescale Semiconductor
Table 15-7. GPIO F Memory Map (GPIOF_BASE = $1FFE74)
Address Offset
Register Acronym
Register Name
Access Type
Chapter Location
Base + $0
GPIO_F_PER
Peripheral Enable Register
Read/Write
Section 15.8.7
Base + $1
GPIO_F_DDR
Data Direction Register
Read/Write
Section 15.8.14
Base + $2
GPIO_F_DR
Data Register
Read/Write
Section 15.8.22
Base + $3
GPIO_F_PUR
Pull-Up Enable Register
Read/Write
Section 15.8.30
Add.
Offset
Register Name
15
14
13
12
11
10
98765
4321
0
$0
PER
R
1
1
1
1
1
1
1
1
1
1
1
1
PE
W
$1
DDR
R
0
0
0
0
0
0
0
0
0
0
0
0
DD
W
$2
DR
R
0
0
0
0
0
0
0
0
0
0
0
0
DATA
W
$3
PUR
R
1
1
1
1
1
1
1
1
1
1
1
1
PUE
W
R
0
Read as 0
W
Reserved
Figure 15-7. GPIO F Register Map Summary
Table 15-8. GPIO G Memory Map (GPIOG_BASE = $1FFE78)
Address Offset
Register Acronym
Register Name
Access Type
Chapter Location
Base + $0
GPIO_G_PER
Peripheral Enable Register
Read/Write
Section 15.8.7
Base + $1
GPIO_G_DDR
Data Direction Register
Read/Write
Section 15.8.15
Base + $2
GPIO_G_DR
Data Register
Read/Write
Section 15.8.23
Base + $3
GPIO_G_PUR
Pull-Up Enable Register
Read/Write
Section 15.8.31
Add.
Offset
Register Name
15
14
13
12
11
10
98765
4321
0
$0
PER
R
1
1
1
1
1
1
1
1
1
1
1
1
PE
W
$1
DDR
R
0
0
0
0
0
0
0
0
0
0
0
0
DD
W
$2
DR
R
0
0
0
0
0
0
0
0
0
0
0
0
DATA
W
$3
PUR
R
1
1
1
1
1
1
1
1
1
1
1
1
PUE
W
R
0
Read as 0
W
Reserved
Figure 15-8. GPIO G Register Map Summary



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