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DSP56857 Datasheet(PDF) 410 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 410 Page - Freescale Semiconductor, Inc |
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410 / 662 page  Register Descriptions 5685X Digital Signal Controller User Manual, Rev. 4 15-10 Freescale Semiconductor 15.8.1 Port A Peripheral Enable Register (GPIOA_PER) Figure 15-10. Port A Peripheral Enable Register (GPIOA_PER) See Programmer’s Sheet on Appendix page B - 105 15.8.1.1 Reserved—Bits 15–4 These bits are reserved or not implemented. They are read as 1 and cannot be modified by writing. 15.8.1.2 Peripheral Enable (PE)—Bits 3–0 These bits control whether a given pin is in either Normal or GPIO mode. • 0 = GPIO mode; pin operation is controlled by GPIO registers • 1 = Normal mode; pin operation is controlled by the EMI module 15.8.2 Port B Peripheral Enable Register (GPIOB_PER) Figure 15-11. Port B Peripheral Enable Register (GPIOB_PER) See Programmer’s Sheet on Appendix page B - 106 15.8.2.1 Peripheral Enable (PE)—Bits 15–0 These bits control whether a given pin is in either Normal or GPIO mode. • 0 = GPIO mode; pin operation is controlled by GPIO registers • 1 = Normal mode; pin operation is controlled by the Host Interface Eight module Base + $0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 1 1 1 1 1 1 1 1 1 1 1 1 PE Write Reset 111 111 11 1 1 1 1 1 1 1 1 Base + $0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read PE Write Reset 111 111 11 1 1 1 1 1 1 1 1 |
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