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DSP56857 Datasheet(PDF) 412 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 412 Page - Freescale Semiconductor, Inc |
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412 / 662 page  Register Descriptions 5685X Digital Signal Controller User Manual, Rev. 4 15-12 Freescale Semiconductor 15.8.5 Port E Peripheral Enable Register (GPIOE_PER) Figure 15-14. Port E Peripheral Enable Register (GPIOE_PER) See Programmer’s Sheet on Appendix page B - 109 15.8.5.1 Reserved—Bits 15–4 These bits are reserved or not implemented. They are read as 1 and cannot be modified by writing. 15.8.5.2 Peripheral Enable (PE)—Bits 3–0 These bits control whether a given pin is in either Normal or GPIO mode. • 0 = GPIO mode; pin operation is controlled by GPIO registers • 1 = Normal mode; pin operation is controlled by the SCI module 15.8.6 Port F Peripheral Enables Register (GPIOF_PER) Figure 15-15. Port F Peripheral Enables Register (GPIOF_PER) See Programmer’s Sheet on Appendix page B - 110 15.8.6.1 Reserved—Bits 15–4 These bits are reserved or not implemented. They are read as 1 and cannot be modified by writing. 15.8.6.2 Peripheral Enable (PE)—Bits 3–0 These bits control whether a given pin is in either Normal or GPIO mode. • 0 = GPIO mode; pin operation is controlled by GPIO registers • 1 = Normal mode; pin operation is controlled by the SPI module Base + $0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 1 1 1 1 1 1 1 1 1 1 1 1 PE Write Reset 111 111 11 1 1 1 1 1 1 1 1 Base + $0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 1 1 1 1 1 1 1 1 1 1 1 1 PE Write Reset 111 111 11 1 1 1 1 1 1 1 1 |
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