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DSP56857 Datasheet(PDF) 413 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 413 Page - Freescale Semiconductor, Inc |
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413 / 662 page  Register Descriptions General Purpose Input/Output (GPIO), Rev. 4 Freescale Semiconductor 15-13 15.8.7 Port G Peripheral Enables Register (GPIOG_PER) Figure 15-16. Port G Peripheral Enables Register (GPIOG_PER) See Programmer’s Sheet on Appendix page B - 111 15.8.7.1 Reserved—Bits 15–4 These bits are reserved or not implemented. They are read as 1 and cannot be modified by writing. 15.8.7.2 Peripheral Enable (PE)—Bits 3–0 These bits control whether a given pin is in either Normal or GPIO mode. • 0 = GPIO mode; pin operation is controlled by GPIO registers • 1 = Normal mode; pin operation is controlled by the TMR module 15.8.8 Port H Peripheral Enables Register (GPIOH_PER) Figure 15-17. Port H Peripheral Enables Register (GPIOH_PER) See Programmer’s Sheet on Appendix page B - 112 15.8.8.1 Reserved—Bits 15–3 These bits are reserved or not implemented. They are read as 1and cannot be modified by writing. 15.8.8.2 Peripheral Enable (PE)—Bits 2–0 These bits control whether a given pin is in either Normal or GPIO mode. • 0 = GPIO mode; pin operation is controlled by GPIO registers • 1 = Normal mode; pin operation is controlled by the SIM module Base + $0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 1 1 1 1 1 1 1 1 1 1 1 1 PE Write Reset 11 111 111 1 1 1 1 1 1 1 1 Base + $0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 1 1 1 1 1 1 1 1 1 1 1 1 1 PE Write Reset 1111 1111 1 1 1 1 1 1 1 1 |
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