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DSP56857 Datasheet(PDF) 435 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 435 Page - Freescale Semiconductor, Inc |
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435 / 662 page ![]() Host Side Register Descriptions Host Interface Eight (HI8), Rev. 4 Freescale Semiconductor 16-9 16.7 Host Side Register Descriptions HI8 contains eight Host Side Interface registers outlined in Table 16-3. Table 16-3. HI8 Host Side Register Map (HI8 HOST SIDE_BASE = $1FFFD8) Address Offset Register Acronym Register Name Access Type Chapter Location HLEND = 0 (Big Endian) HLEND = 1 (Little Endian) Base + $0 ICR ICR Interface Control Read/Write Section 16.9.1 Base + $1 CVR CVR Command Vector Read/Write Section 16.9.2 Base + $2 ISR ISR Interface Status Read Only Section 16.10.1 Base + $3 IVR IVR Interrupt Vector Read/Write Section 16.10.2 Base + $4 — — Unused Read as 00 — Base + $5 — — Unused Read as 00 — Base + $6 RXH/TXH RXL/TXL Receive/Transmit Bytes Read/Write Section 16.10.3 Base + $7 RXL/TXL RXH/TXH Transmit/Receive Bytes Read/Write Section 16.10.4 Add. Offset Register Name 7654321 0 $0 ICR R INIT HM1 HM0 HF1 HF0 HLEND TREQ RREQ W $1 CVR R HC HV6 HV5 HV4 HV3 HV2 HV1 HV0 W $2 ISR R HREQ DMA 0 HF3 HF2 TRDY TXDE RXDF W $3 IVR R IV7 IV6 IV5 IV4 IV3 IV2 IV1 IV0 W R 0 Read as 0 W Reserved Figure 16-3. DSC Host Side Register Map Summary |
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