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GPCE063A Datasheet(PDF) 13 Page - Generalplus Technology Inc. |
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GPCE063A Datasheet(HTML) 13 Page - Generalplus Technology Inc. |
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13 / 29 page ![]() GPCE063A © Generalplus Technology Inc. Proprietary & Confidential 13 Oct. 04, 2013 Version: 1.8 PWM: Pulse Width Modulation Refer to the above table, the configuration of IOA9, IOA10, IOA11, and IOA12 involves feedback function in which an OSC frequency can be obtained from EXT1 (EXT2) by simply adding a RC circuit between IOA8 (IOA10) and IOA9 (IOA11). 6.9. Timer / Counter GPCE063A provides three 16-bit timers/counters - TimerA, TimerB and TimerC or so called universal counters. The clock sources of Timer A/B/C are from clock source Input 1 and clock source Input 2 (see below table) which perform AND operation to form the varieties of combinations. When timer overflows, a timeout signal (TAOUT) is sent to CPU interrupt module to generate a timer interrupt signal. In addition, Timer A/B/C hardware interrupt events can be used to latch the DAC audio output and trigger ADC conversion. Example to Timer A, sending a write signal into TMA_CNT, the value of TMA_DATA (value=N) will reload into TMA_CNT and set an appropriated clock source. Timer wills up-count from N, N+1, N+2… 0XFFFF. An INT signal is generated at the moment of timer rolling over from “0xFFFF” to “0x0000”, and an INT signal is processed by INT controller immediately. At the same time, N will be reloaded into TMA_CNT and start counting again. In Timer A, the clock Input 1 is a high frequency source and clock Input 2 is a low frequency clock source. The combination of clock Input 1 and 2 provides varieties of speeds to TimerA/CounterA - “1” representing pass signal (not gating), and “0” meaning timer deactivated. For instance, if Input 1=”1”, the clock is depending on Input 2. If Input 1=”0”, the TimerA is deactivated. The EXT1/ETX2 is the external clock source 1 and external clock source 2. |
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