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GPL083B1 Datasheet(PDF) 4 Page - Generalplus Technology Inc. |
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GPL083B1 Datasheet(HTML) 4 Page - Generalplus Technology Inc. |
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4 / 11 page ![]() GPL083B1 © Generalplus Technology Inc. Proprietary & Confidential 4 Aug. 26, 2015 Version: 1.0 4. SIGNAL DESCRIPTIONS Mnemonic Type Description SEG[49:0] O LCD driver segment output. COM[3:0] O LCD driver common output. PA[1:0] I/O GPIO I/O port. PC[7:0] I/O GPIO I/O port. PE[7:0] I Input port. (also for key wake up input) ACON I Clear or system power on pin (active low) and 4ms de-bounce circuit inside. PTEST I Test mode input pin. (active high) VS I Solar cell power input. VB I Battery power input. VDDSW O Power switch output. VREG O Internal regulator output. VSS I Ground input. V1X V2X V3X O VLCD generator output. CUP1 CUP2 I Inputs for setting LCD bias. |
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