GPL083B1

© Generalplus Technology Inc.

Proprietary & Confidential

5

Aug. 26, 2015

Version: 1.0

5. FUNCTIONAL DESCRIPTIONS

5.1. CPU

The 8-bit microprocessor in GPL083B1 is a high performance

processor equipped with Accumulator, Program Counter, X

Register, Y Register, Stack pointer and Processor Status Register

(the same as the 6502 instruction structure).

5.2. Clock Source

The GPL083B1 equips with two internal RC oscillators.

One

generates high frequency to support the whole system operation.

It provides three frequency options: the 225KHz and 1800kHz can

be selected by mask options according to various applications.

The other one generates low frequency 30.72KHz to control LCD

frame rate and time base timer.

5.3. ROM/RAM Area

The GPL083B1 provides 24K-byte ROM that can be defined as

the program area where address locates from $9800 to $FFFF.

Its RAM consists of 192 bytes (including Stack) at locations from

$60 through $11F and $160 to $1FF.

The address range from

$160 to $1FF is mapping to the same address area from $60 to

$FF.

5.4. Stop Clock Mode

The GPL083B1 provides a power saving mode for those

applications requiring very low stand-by current.

Users can

simply enable the wake-up sources and stop the CPU clock by

writing the STOP CLOCK Register ($09).

Therefore, CPU will

enter standby mode, and RAM and I/Os will keep retaining at their

previous states until being awakened.

There are four wakeup

sources in the GPL083B1 - Port PE wake-up, T2Hz, T16Hz or

T128Hz wake-up.

After the GPL083B1 wakes up, CPU will go to

the next state of Sleep.

Wake-up action will not affect RAM and

I/Os.

Note1: T16Hz: 32Hz, 16Hz, 8Hz or 4Hz

Note2: T2Hz: 2Hz or 1Hz

5.5. I/O Ports

The GPL083B1 has three I/O ports: Port A, Port C, and Port E.

These port pins are all equipped with special features for key

board scan.

In general, when in initial reset state, all ports are

used as a general purpose input port.

Port A and Port C contain

three major parts: data, direction and attribution registers.

Port E

is only for input and contains two parts: data and attribution

registers.

Programmer should follow the following table to set

each I/O function with corresponding bits in each port.

Port A[1:0], C[7:0]

Attribution

Direction

Data

Function

Description

0

0

0

Input with pull-low

General Purpose

I/O function

0

0

1

Pure Input

0

1

0

Output Low

0

1

1

Output High

1

1

0

Pad Floating

Special function

Port E[7:0]

Attribution

Data

Function

Description

0

0

Input with pull-low

General Purpose

I/O function

0

1

Pure Input

5.6. LCD Controller

GPL083B1 contains a LCD controller/driver that provides the

capability to drive four commons and fifty segments LCD.

To light

the CPU overhead, a display buffer is designed for mapping LCD.

A LCD dot/pattern is set ON or OFF by programming the

corresponding bits of the display buffer.

In addition, the LCD bias

can be programmed as 1/2 or 1/3.

The duty can be selected as

1/2, 1/3, 1/4.

In spite of the duty selection, its frame rate is

always set at 80Hz.

5.7. Auxiliary Calculation Hardware

GPL083B1

contains

auxiliary

calculation

hardware.

This

hardware allows some nibble operation to accomplish only at one

store and load instruction.

The original data content should be

stored at the register ($50, $51) firstly, and then many decimal

operation such as x10/10 or nibble swap, can be acquired by

executing read instruction at the corresponding registers ($52~5D).

It speeds up many decimal operations that originally need many

instructions for one operation.