GPL191B2

© Generalplus Technology Inc.

Proprietary & Confidential

4

Mar. 08, 2010

Version: 1.1

4. BLOCK DIAGRAM

PROCESSOR

OSC GEN

TIME BASE

&

INTERRUPT

LOGIC

256K BYTES

ROM

704 BYTES

SRAM

TWO

16-BIT

AUTO

RELOADABLE

TIMER/COUNTERS

4

I/O

P

O

R

T

P

W

M

128 Bytes LCD

RAM

64 SEGMENTS x 16 COMMONS LCD DRIVER

MASK OPTION

ROSC

X32I

X32O

IOEF3-0 ( I/O)

AUDP

AUDN

TxD/IOEF4

RxD/IOEF5

COM15-0

SEG51-0

SEG59-52/IOAB7-0

SEG63-60/IOCD3-0

REGULATOR

DOUBLER

Watchdog

Timer

VOLTAGE

DETECTOR

U

A

R

T

16

4

4

8

52

8

4

8-BIT

MICRO

Note1: IOAB7 - 0 can be enabled by mask option from Segment 59 - 52. Each I/O (segment) can be mask optioned individually.

Note2: IOCD3 - 0 can be applied as segment 63 - 60 by mask option. Each I/O corresponds to one segment.

Note3: Common 15 - 12 can be optioned to IOEF7 - 6 when LCD driving type is selected as 1/8 duty or 1/12 duty.

Note4: TxD and RxD can be optioned to IOEF5 - 4 when UART is not used.