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GPM8F3832A Datasheet(PDF) 21 Page - Generalplus Technology Inc. |
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GPM8F3832A Datasheet(HTML) 21 Page - Generalplus Technology Inc. |
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21 / 137 page ![]() P Prre elliim miin na arry y GPM8F3832A © Generalplus Technology Inc. Proprietary & Confidential 21 Aug. 08, 2017 Preliminary Version: 0.4 DPS Address: 0x86 Data Pointer Select Register Bit 7 6 5 4 3 2 1 0 Function ID1 ID0 TSL - - - - SEL Default 0 0 0 0 0 0 0 0 Bit Function Type Description Condition 7:6 ID[1:0] R/W Increment/decrement function select. See Table 5-15 5 TSL R/W Toggle select enable bit 0: DPTR related instructions do not affect state of SEL bit 1: DPTR related instructions to toggle the SEL bit p.s. The DPTR related instructions are as below a.MOVX A,@DPTR b.MOVX @DPTR,A c.INC DPTR d.MOV DPTR,#data16 e.MOVC A,@A+DPTR 4:1 -- R/W Reserved 0 SEL R/W Active data pointer select bit See Table 5-15 Table 5-14 The DPS register ID1 ID0 SEL=0 SEL=1 0 0 INC DPTR0 INC DPTR1 0 1 DEC DPTR0 INC DPTR1 1 0 INC DPTR0 DEC DPTR1 1 1 DEC DPTR0 DEC DPTR1 Table 5-15 DPTR0/DPTR1 operations SP Address: 0x81 Stack Pointer Register Bit 7 6 5 4 3 2 1 0 Function SP[7:0] Default 0 0 0 0 0 1 1 1 Bit Function Type Description Condition 7:0 SP[7:0] R/W Stack pointer Table 5-16 The SP register |
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