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GD25B64C Datasheet(PDF) 48 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25B64C Datasheet(HTML) 48 Page - GigaDevice Semiconductor (Beijing) Inc. |
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48 / 57 page  3.3V Uniform Sector Dual and Quad Serial Flash GD25B64C 48 8.6. AC CHARACTERISTICS (T= -40℃~85℃, VCC=2.7~3.6V, CL=30pf) Symbol Parameter Min. Typ. Max. Unit. fC Serial Clock Frequency For: Dual I/O (BBH), Quad I/O (EBH), Quad Output (6BH) (Dual I/O & Quad I/O Without High Performance Mode), on 3.0V-3.6V power supply 104 MHz fC1 Serial Clock Frequency For: Dual I/O (BBH), Quad I/O (EBH), Quad Output (6BH) (Dual I/O & Quad I/O Without High Performance Mode), on 2.7V-3.0V power supply 80 MHz fC2 Serial Clock Frequency For: Dual I/O (BBH), Quad I/O (EBH), Quad Output (6BH) (Dual I/O & Quad I/O With High Performance Mode), on 2.7V-3.6V power supply 120 MHz fC3 Serial Clock Frequency For: Fast Read (0BH) (with/without High Performance Mode), on 2.7V-3.6V power supply 120 MHz fR Serial Clock Frequency For: Read (03H), Read Status Register (05H, 15H, 35H) Read Device ID (ABH, 90H, 92H, 94H, 9FH) 80 MHz tCLH Serial Clock High Time 3.5 ns tCLL Serial Clock Low Time 3.5 ns tCLCH Serial Clock Rise Time (Slew Rate) 0.1 V/ns tCHCL Serial Clock Fall Time (Slew Rate) 0.1 V/ns tSLCH CS# Active Setup Time 5 ns tCHSH CS# Active Hold Time 5 ns tSHCH CS# Not Active Setup Time 5 ns tCHSL CS# Not Active Hold Time 5 ns tSHSL CS# High Time (Read/Write) 20 ns tSHQZ Output Disable Time 6 ns tCLQX Output Hold Time 1.2 ns tDVCH Data In Setup Time 2 ns tCHDX Data In Hold Time 2 ns tCLQV Clock Low To Output Valid 7 ns tDP CS# High To Deep Power-Down Mode 20 μs tRES1 CS# High To Standby Mode Without Electronic Signature Read 20 μs tRES2 CS# High To Standby Mode With Electronic Signature Read 20 μs tSUS CS# High To Next Command After Suspend 20 μs tRS Latency Between Resume And Next Suspend 100 μs tRST CS# High To Next Command After Reset (Except From Erase) 30 μs tRST_E CS# High To Next Command After Reset (From Erase) 12 ms tW Write Status Register Cycle Time 5 30 ms |
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