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AT73C213 Datasheet(PDF) 11 Page - ATMEL Corporation |
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AT73C213 Datasheet(HTML) 11 Page - ATMEL Corporation |
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11 / 35 page ![]() 11 2744A–PMGMT–27-Jan- AT73C213 2744A–PMGMT–27-Jan-05 7.4 Timing Specifications Figure 7-7. Data Interface Timing Diagram Table 7-2. Data Interface Timing Parameters Parameter Min Typ Max Unit td1 Delay from MCLK rising edge to BCLK edges 2.5 7.5 ns td2 Delay from BCLK falling edge to LRFS edges 0 5 ns ts3 din set-up time before BCLK rising edge 10 ns th3 din hold time after BCLK rising edge 10 ns MCLK BCLK 1 1 N 19N+1 20N 20 M/2+1 M M/2.N+1 M/2.(N+1) (M-1).N+1 M.N LRFS SDIN td1 td2 ts3 th3 |
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