STR720 datasheet(217/401 Pages) STMICROELECTRONICS

217 / 401 page

STR720 - CONTROLLER AREA NETWORK (CAN)

217/401

Test Register (CAN_TESTR)

Address Offset: 14h

Reset value: 0000 0000 R000 0000 b (R:current value of RX pin)

Write access to the Test Register is enabled by setting the Test bit in the CAN Control

≠ “00” disturbs message

transfer.

7654

Reserved

Res

rrw

Bits 15:8

Reserved

These are reserved bits. These bits are always read as ‘0’ and must always

be written with ‘0’.

Bit 7

Rx: Current value of CAN_RX Pin

0: The CAN bus is dominant (CAN_RX = ‘0’).

1: The CAN bus is recessive (CAN_RX = ‘1’).

Bit 6:5

Tx[1:0]: CAN_TX pin control

00: Reset value, CAN_TX is controlled by the CAN Core

01: Sample Point can be monitored at CAN_TX pin

10: CAN_TX pin drives a dominant (‘0’) value.

11: CAN_TX pin drives a recessive (‘1’) value.

Bit 4

LBack: Loop Back Mode

0: Loop Back Mode is disabled.

1: Loop Back Mode is enabled.

Bit 3

Silent: Silent Mode

0: Normal operation.

1: The module is in Silent Mode.

Bit 2

Basic: Basic Mode

0: Basic Mode disabled.

1: IF1 Registers used as Tx Buffer, IF2 Registers used as Rx Buffer.

Bits 1:0

Reserved.

These are reserved bits. These bits are always read as ‘0’ and must always

be written with ‘0’.

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