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STR720 Datasheet(PDF) 215 Page - STMicroelectronics |
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STR720 Datasheet(HTML) 215 Page - STMicroelectronics |
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215 / 401 page ![]() STR720 - CONTROLLER AREA NETWORK (CAN) 215/401 Status Interrupts A Status Interrupt is generated by bits BOff and EWarn (Error Interrupt) or by RxOk, TxOk, and LEC (Status Change Interrupt) assuming that the corresponding enable bits in the CAN Control Register are set. A change of bit EPass or a write to RxOk, TxOk, or LEC will never generate a Status Interrupt. Reading the Status Register will clear the Status Interrupt value (8000h) in the Interrupt Register, if it is pending. Error Counter (CAN_ERR) Address Offset: 08h Reset value: 0000h 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 RP REC[6:0] TEC[7:0] rr r Bit 15 RP: Receive Error Passive 0: The Receive Error Counter is below the error passive level. 1: The Receive Error Counter has reached the error passive level as defined in the CAN Specification. Bits 14:8 REC[6:0]: Receive Error Counter Actual state of the Receive Error Counter. Values between 0 and 127. Bits 7:0 TEC[7:0]: Transmit Error Counter Actual state of the Transmit Error Counter. Values between 0 and 255. 1 |
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