1 Overview

This chapter gives an overview of the 512-Mbit Synchronous DRAM component product and describes its main

characteristics.

1.1

Features

Speed Code

-7

Unit

133

MHz

Max. Clock Frequency

@CL3

7.5

ns

5.4

ns

@CL2

10

ns

6

ns

@CL1

20

ns

17

ns

AS4C16M32SC-7TIN

AS4C32M16SC-7TIN

AS4C64M8SC-7TIN

Confidential

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Rev.1.0 Sep. 2018

Table1.KeySpecifications

Table2.OrderingInformation

Part Number

Frequency

Package

Temperature

Temp Range

AS4C16M32SC-7TIN

133MHz

86PinTSOPII

AS4C32M16SC-7TIN

133MHz

54PinTSOPII

-40°Cto85°C

AS4C64M8SC-7TIN

133MHz

54PinTSOPII

Industrial

-40°Cto85°C

-40°Cto85°C

•

•

•

•

- CAS Latency: 1 or 2 or 3

- Burst Length: 1, 2, 4, 8, or full page

- Burst Type: Sequential or Interleaved

•

Power down mode

•

Single +3.3V±0.3V power supply

- Industrial: TA = -40~85°C

•

- Pb free and Halogen free

Fully Synchronous to Positive Clock Edge

Four Banks controlled by BA0 & BA1

Multiple Burst Read with Single Write Operation

Automatic and Controlled Precharge Command

Data Mask for Read / Write control (x8, x16, x32)

Data Mask for Byte Control (x16,x32)

Random Column Address every CLK (1-N Rule)

Available in 86/54 Pin 400 mil plastic TSOP II package,TSOPII–54 (x8, x16) TSOPII–86 (x32)

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•

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