68HC05JB3 datasheet(39/134 Pages) FREESCALE

39 / 134 page

November 5, 1998

GENERAL RELEASE SPECIFICATION

MC68HC05JB3

RESETS

MOTOROLA

REV 1

5-1

SECTION 5

RESETS

This section describes the six reset sources and how they initialize the MCU. A

reset immediately stops the operation of the instruction being executed, initializes

certain control bits, and loads the program counter with a user deﬁned reset vec-

tor address. The following conditions produce a reset:

•

Initial power up of device (power on reset).

•

A logic zero applied to the RESET pin (external reset).

•

Timeout of the COP watchdog (COP reset).

•

Low voltage applied to the device (LVR reset).

•

Fetch of an opcode from an address not in the memory map (illegal

address reset).

•

Detection of USB reset signal (USB reset).

Figure 5-1 shows a block diagram of the reset sources and their interaction.

Figure 5-1. Reset Sources

RESET

LATCH

COP WATCHDOG

POWER-ON RESET

ILLEGAL ADDRESS RESET

INTERNAL

CLOCK

RST

TO CPU

AND

LOW VOLTAGE RESET

VDD

SUBSYSTEMS

ADDRESS BUS

USB RESET DETECTION

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

68HC05JB3 Datasheet(PDF) 39 Page - Freescale Semiconductor, Inc

68HC05JB3 Datasheet(HTML) 39 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL