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IP4786CZ32S Datasheet(PDF) 21 Page - Nexperia B.V. All rights reserved

Part # IP4786CZ32S
Description  DVI and HDMI interface ESD and overcurrent protection, DDC/CEC buffering, hot plug detect and backdrive protection
PDF  36 Pages
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Manufacturer  NEXPERIA [Nexperia B.V. All rights reserved]
Direct Link  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved

IP4786CZ32S Datasheet(HTML) 21 Page - Nexperia B.V. All rights reserved

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IP4786CZ32S
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 7 January 2015
20 of 35
NXP Semiconductors
IP4786CZ32S
DVI and HDMI interface ESD and overcurrent protection
11.2 Operating and standby modes
The operating mode of IP4786CZ32S depends on the availability of the VCC(5V0) and
VCC(SYS) supply voltages and on the state of the CEC_STBY input signal. Without
availability of both supplies, IP4786CZ32S is in Standby mode. As soon as VCC(5V0) and
VCC(SYS) are within the range specified in Section 8, the part is in an operating mode that
can be controlled via the CEC_STBY input signal. In case CEC_STBY is LOW, only the
CEC buffer is active and enabled to receive or send CEC commands. All other outputs are
in a high-ohmic state. A HIGH input signal enables all parts of IP4786CZ32S and puts the
device into full operating mode.
[1]
X = Don’t care (either LOW or HIGH level); L = LOW-level input; H = HIGH-level input
If no CEC Standby mode is required, or if no special Power-down modes are desired, the
CEC_STBY pin can be pulled HIGH to VCC(5V0) or VCC(SYS) for continuous HDMI and CEC
operation as soon as the supplies are available.
Strapping the CEC_STBY = VCC(SYS) =VDD of the ASIC guarantees that all interface
signals ending with the suffix “_SYS” on the system side are disabled when VCC(SYS) goes
LOW. This configuration protects the ASIC I/O signals from exceeding its local VDD. In this
mode, even if VCC(5V0) is powered, HDMI_5V0_CON goes active and hot plug events can
be detected only when the ASIC power supply rail is on.
Strapping CEC_STBY = VCC(5V0) is the most basic configuration where the buffers are
enabled whenever the local VCC(5V0) and VCC(SYS) supplies reach minimum operating
levels.
Table 11.
IP4786CZ32S operating modes
VCC(SYS)
VCC(5V0)
CEC_STBY[1]
Mode
Description
< 1.1 V
< 4.5 V
X
Standby mode
all outputs high-ohmic
 1.1 V
 4.5 V
L
CEC Standby mode
CEC circuit active;
all other outputs high-ohmic
H
full operating mode
all functional blocks active



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