SC16C752IB48 datasheet(11/47 Pages) PHILIPS

11 / 47 page

Philips Semiconductors

SC16C752

Dual UART with 64-byte FIFO

Product data

Rev. 04 — 20 June 2003

11 of 47

9397 750 11635

60 characters have been sent. At this time, UART2 will transmit a 0F to UART1,

informing UART1 to halt transmission. UART1 will likely send the 61st character while

UART2 is sending the Xoff character. Now UART2 is serviced and the processor

reads enough data out of the RX FIFO that the level drops to 32. UART2 will now

send a 0D to UART1, informing UART1 to resume transmission.

6.4 Reset

Table 4 summarizes the state of register after reset.

[1]

Registers DLL, DLH, SPR, Xon1, Xon2, Xoff1, Xoff2 are not reset by the top-level reset signal

RESET, i.e., they hold their initialization values during reset.

Table 5 summarizes the state of registers after reset.

Table 4:

Reset control

Reset state

Interrupt enable register

RESET

All bits cleared.

Interrupt identiﬁcation register

RESET

Bit 0 is set. All other bits cleared.

FIFO control register

RESET

All bits cleared.

Line control register

RESET

Reset to 00011101 (1D hex).

Modem control register

RESET

All bits cleared.

Line status register

RESET

Bits 5 and 6 set. All other bits cleared.

Modem status register

RESET

Bits 0-3 cleared. Bits 4-7 input signals.

Enhanced feature register

RESET

All bits cleared.

Receiver holding register

RESET

Pointer logic cleared.

Transmitter holding register

RESET

Pointer logic cleared.

Transmission control register

RESET

All bits cleared.

Trigger level register

RESET

All bits cleared.

Table 5:

Signal RESET functions

Signal

Reset control

Reset state

RESET

high

RTS

RESET

high

DTR

RESET

high

RXRDY

RESET

high

TXRDY

RESET

low

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