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ST8500TR Datasheet(PDF) 10 Page - STMicroelectronics |
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ST8500TR Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 37 page ![]() Device architecture ST8500 10/37 DocID031029 Rev 3 2 9 crm_error_irq CRM error interrupt 0x00000048 3 10 WWDG Window watchdog - global interrupt 0x0000004C 4 11 GPT0 GPT0 - global interrupt 0x00000050 5 12 GPT1 GPT1 - global interrupt 0x00000054 6 13 GPT2 GPT2 - global interrupt 0x00000058 7 14 GPT3 GPT3 - global interrupt 0x0000005C 8 15 SPI0 SPI0 - global interrupt 0x00000060 9 16 SPI1 SPI1 - global interrupt 0x00000064 10 17 SPI2 SPI2 - global interrupt 0x00000068 11 18 USART0 USART0 - global interrupt 0x0000006C 12 19 USART1 USART1 - global interrupt 0x00000070 13 20 USART2 USART2 - global interrupt 0x00000074 14 21 IPC_mailbox IPC - mailbox interrupt 0x00000078 15 22 IPC_queues IPC - queues interrupt 0x0000007C 16 23 IPC_mem IPC - shared memory Interrupt 0x00000080 17 24 I2C_event I2C0 - global event interrupt 0x00000084 18 25 I2C_error I2C0 - global error interrupt 0x00000088 19 26 AES AES - global interrupt 0x0000008C 20 27 OTP_error OTP - global error interrupt 0x00000090 21 28 OTP_eoo OTP - end of operation interrupt 0x00000094 22 29 GPIO00 GPIO0 - global interrupt 0x00000098 23 30 GPIO01 GPIO1 - global interrupt 0x0000009C 24 31 - Reserved 0x000000A0 25 32 GPIO03 GPIO3 - global interrupt 0x000000A4 26 33 - Reserved 0x000000A8 27 34 - Reserved 0x000000AC 28 35 - Reserved 0x000000B0 29 36 FPU Floating point unit - global interrupt 0x000000B4 30 37 - Reserved 0x000000B8 31 38 - Reserved 0x000000BC Table 3. Interrupt definition and position (continued) Position Hardware priority Acronym Description Offset from VTOR |
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