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IMX8DXIEC Datasheet(PDF) 68 Page - NXP Semiconductors |
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IMX8DXIEC Datasheet(HTML) 68 Page - NXP Semiconductors |
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68 / 127 page  Electrical characteristics i.MX 8DualX Industrial Applications Processors, Rev. 0, 05/2020 NXP Semiconductors 68 Figure 26. ESAI Receive timing The following table shows the interface timing values. The ID field in the table refers to timing signals found in Figure 25 and Figure 26. Table 62. Enhanced Serial Audio Interface (ESAI) Timing ID Parameters Min Max Condition1 Unit — Clock frequency — 24.576 — MHz t1 SCKT / SCKT pulse width high / low 45% 55% — SCKT / SCKR period t2 FST output delay — 10 2 x ck i ck ns t3 TX data - high impedance / valid data — 9 1 x ck i ck ns t4 TX data output delay — 10 2 x ck i ck ns t5 FST - setup requirement — 2 10 x ck i ck ns t6 FST - hold requirement — 2 0 x ck i ck ns t7 Flag output delay 10 2 x ck i ck ns |
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