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IS25LP064A-RGLA1 Datasheet(PDF) 29 Page - Integrated Silicon Solution, Inc

Part # IS25LP064A-RGLA1
Description  3V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  99 Pages
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP064A-RGLA1 Datasheet(HTML) 29 Page - Integrated Silicon Solution, Inc

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IS25LP064A/032A
Integrated Silicon Solution, Inc.- www.issi.com
29
Rev. A
11/06/2015
Figure 8.4 Fast Read Dual I/O Sequence (with command decode cycles)
7
5
3
7
5
1
3
1
Data Out 1
Instruction = BBh
22
CE #
SCK
2
0
6
4
3-byte Address
High Impedance
20
18
...
0
1
2
3
4
5
6
7
8
9
10
...
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
Mode 3
Mode 0
...
tV
23
3
1
7
5
21
19
...
IO0
IO1
3
1
2
0
6
4
2
6
4
0
2
0
4 Dummy Cycles
7
5
3
1
6
4
2
0
7
5
...
6
4
...
CE #
SCK
IO0
IO1
Data Out 2
Data Out 3
Mode Bits
Mode Bits
Notes:
1. If the mode bits=AXh (
where X is don’t care), it can execute the AX read mode (without command). When the
mode bits are different from AXh, the device exits the AX read operation.
2. Number of dummy cycles depends on clock speed. Detailed information in Table 6.10. Read Dummy Cycles.
3. Since the number of dummy cycles and AX bit cycles are same in the above Figure, X should be Hi-Z to avoid I/O
contention.



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