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STM32F722IC Datasheet(PDF) 183 Page - STMicroelectronics |
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STM32F722IC Datasheet(HTML) 183 Page - STMicroelectronics |
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183 / 229 page ![]() DS11853 Rev 6 183/229 STM32F722xx STM32F723xx Electrical characteristics 201 Figure 65. Asynchronous multiplexed PSRAM/NOR write waveforms Table 99. Asynchronous multiplexed PSRAM/NOR write timings(1) Symbol Parameter Min Max Unit tw(NE) FMC_NE low time 4Thclk -1 4Thclk +1 ns tv(NWE_NE) FMC_NEx low to FMC_NWE low Thclk -0.5 Thclk +0.5 tw(NWE) FMC_NWE low time 2Thclk -0.5 2Thclk +0.5 th(NE_NWE) FMC_NWE high to FMC_NE high hold time Thclk -0.5 - tv(A_NE) FMC_NEx low to FMC_A valid - 0 tv(NADV_NE) FMC_NEx low to FMC_NADV low 0 0.5 tw(NADV) FMC_NADV low time Thclk Thclk +1 th(AD_NADV) FMC_AD(adress) valid hold time after FMC_NADV high) Thclk +0.5 - th(A_NWE) Address hold time after FMC_NWE high Thclk +0.5 - th(BL_NWE) FMC_BL hold time after FMC_NWE high Thclk -0.5 - tv(BL_NE) FMC_NEx low to FMC_BL valid - 0.5 tv(Data_NADV) FMC_NADV high to Data valid - Thclk +1.5 th(Data_NWE) Data hold time after FMC_NWE high Thclk +0.5 - NBL Data FMC_ NEx FMC_ NBL[1:0] FMC_ AD[15:0] tv(BL_NE) th(Data_NWE) FMC_NOE Address FMC_ A[25:16] tv(A_NE) tw(NWE) FMC_NWE tv(NWE_NE) t h(NE_NWE) th(A_NWE) th(BL_NWE) t v(A_NE) tw(NE) MS32756V1 Address FMC_NADV t v(NADV_NE) tw(NADV) tv(Data_NADV) th(AD_NADV) FMC_NWAIT tsu(NWAIT_NE) th(NE_NWAIT) |
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