FT2232H USB chip gives us two high-speed

JTAG interfaces. The 16 pins of the primary

interface are connected to a CoolRunner-II

CPLD. The CPLD is a programmable buffer that

translates between the FT2232H at 3.3volts, and a

1.5volt to 3.3volt target.

Many JTAG debuggers use the FT2232 chips, but they have slightly different buffers. The CPLD can be

programmed to imitate many of them, so it works out of the box with our favorite open source

debugging apps. Updates are done over USB using the second JTAG interface on the FT2232H.

This project was inspired by a forum post (http://dangerousprototypes.com/forum/viewtopic.php?

f=37&t=403&start=30#p4092) that linked to a Texas Instruments' XDS100 programmer

(http://processors.wiki.ti.com/index.php/XDS100) . TI's design is essentially the same, but we moved

the CPLD JTAG connection to the second JTAG interface for easier reprogramming. Bus Blaster v4 was

developed in a public forum (http://dangerousprototypes.com/forum/index.php?board=37.0) , and

progress was documented on a wiki.

Parts Layout Guide

Hardware

Page 3 of 13