STM32L552CCT3PTR datasheet(229/340 Pages) STMICROELECTRONICS

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DS12737 Rev 6

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STM32L552xx

Electrical characteristics

307

Static latch-up

Two complementary static tests are required on three parts to assess the latch-up

performance:

•

A supply overvoltage is applied to each power supply pin.

•

A current injection is applied to each input, output and configurable I/O pin.

These tests are compliant with EIA/JESD 78E IC latch-up standard.

5.3.14

I/O current injection characteristics

As a general rule, current injection to the I/O pins, due to external voltage below VSS or

above VDDIOx (for standard, 3.3 V-capable I/O pins) should be avoided during normal

product operation. However, in order to give an indication of the robustness of the

microcontroller in cases when abnormal injection accidentally happens, susceptibility tests

are performed on a sample basis during device characterization.

Functional susceptibility to I/O current injection

While a simple application is executed on the device, the device is stressed by injecting

current into the I/O pins programmed in floating input mode. While current is injected into

the I/O pin, one at a time, the device is checked for functional failures.

The failure is indicated by an out of range parameter: ADC error above a certain limit (higher

than 5 LSB TUE), out of conventional limits of induced leakage current on adjacent pins (out

of the -5 µA/+0 µA range) or other functional failure (for example reset occurrence or

oscillator frequency deviation).

The characterization results are given in Table 101.

Negative induced leakage current is caused by negative injection and positive induced

leakage current is caused by positive injection.

Table 100. Electrical sensitivities

Symbol

Parameter

Conditions

Class

Static latch-up class

TA = +105 °C conforming to JESD78E

Class II level A

Table 101. I/O current injection susceptibility

Symbol

Description

Functional

susceptibility

Unit

Negative

injection

Positive

injection

IINJ(1)

1. Guaranteed by characterization.

Injected current on all pins except TT_a, PB0, PB15,

PE9, PG0

-5

Injected current on pins PB0, PB15, PE9, PG0

Injected current on TT_a pins

-5

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