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STM32L552CCT3PTR Datasheet(PDF) 231 Page - STMicroelectronics |
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STM32L552CCT3PTR Datasheet(HTML) 231 Page - STMicroelectronics |
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231 / 340 page  Ilkg Input leakage current FT_xx(3) 0 < VIN ≤ Max(VDDXXX)(4)(5) - - ±100 nA Max(VDDXXX) ≤ VIN ≤ Max(VDDXXX) + 1 V(4)(5) - - 650 Max(VDDXXX) + 1 V < VIN ≤ 5.5 V(4)(5) - - 200 FT_u 0 <VIN ≤ Max(VDDXXX)(4)(5) - - ±150 Max(VDDXXX) ≤ VIN ≤ Max(VDDXXX) +1 V(4)(5) - - 2500(6) Max(VDDXXX) +1 V < VIN ≤ 5.5 V(4)(5)(7) - - 250(6) TT_xx VIN ≤ Max(VDDXXX)(5) - - ±150 Max(VDDXXX) ≤ VIN < 3.6 V(5) - - 2000(2) OPAMPx_VINM(x=1,2) - - - (8) FT_c 0 <VIN ≤ Max(VDDXXX)(3) - - 2000 Max(VDDXXX) < VIN ≤ 5 V(3)(5)(6) - - 3000 FT_d 0 <VIN ≤ Max(VDDXXX)(5) - - 4500 Max(VDDXXX) < VIN ≤ 5.5 V(3)(4)(5) - - 9000 RPU Weak pull-up equivalent resistor VIN = VSS 25 40 55 kΩ RPD Weak pull-down equivalent resistor VIN = VDDIOx 25 40 55 kΩ CIO I/O pin capacitance - - 5 - pF 1. Refer to Figure 40: I/O input characteristics. 2. Guaranteed by design. 3. All FT_xx IO except FT_u and FT_c. 4. This value represents the pad leakage of the IO itself. The total product pad leakage is provided by this formula: ITotal_Ileak_max = 10 μA + [number of IOs where VIN is applied on the pad] × Ilkg(Max). 5. Max(VDDXXX) is the maximum value of all the I/O supplies. Refer to Table: Legend/Abbreviations used in the pinout table. 6. To sustain a voltage higher than MIN(VDD, VDDA, VDDIO2 and VDDUSB) +0.3 V, the internal Pull-up and Pull-Down resistors must be disabled. 7. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This PMOS/NMOS contribution to the series resistance is minimal (~10% order). 8. Refer to Ibias in Table 119: OPAMP characteristics for the values of the OPAMP dedicated input leakage current. Table 102. I/O static characteristics (continued) Sym bol Parameter Conditions Min Typ Max Unit |
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