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STM32L552CCT3PTR Datasheet(PDF) 276 Page - STMicroelectronics

Part # STM32L552CCT3PTR
Description  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 165 DMIPS, up to 512 KB Flash memory, 256 KB SRAM, SMPS
PDF  340 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L552CCT3PTR Datasheet(HTML) 276 Page - STMicroelectronics

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Electrical characteristics
STM32L552xx
276/340
DS12737 Rev 6
Figure 51. SAI master timing waveforms
tv(FS)
FS valid time
Master mode
2.7<=VDD<=3.6
-21
ns
Master mode
1.71<=VDD<=3.6
-25
th(FS)
FS hold time
Master mode
10
-
tsu(FS)
FS setup time
Slave mode
1.5
-
th(FS)
FS hold time
Slave mode
2.5
-
tsu(SD_A_MR)
Data input setup time
Master receiver
1
-
tsu(SD_B_SR)
Slave receiver
1.5
-
th(SD_A_MR)
Data input hold time
Master receiver
5
-
th(SD_B_SR)
Slave receiver
0
-
tv(SD_B_ST)
Data output valid time
Slave transmitter (after enable edge)
2.7<=VDD<=3.6
-19
Slave transmitter (after enable edge)
1.71<=VDD<=3.6
-25
th(SD_B_ST)
Data output hold time
Slave transmitter (after enable edge)
10
-
tv(SD_A_MT)
Data output valid time
Master transmitter (after enable edge)
2.7<=VDD<=3.6
-17
Master transmitter (after enable edge)
1.71<=VDD<=3.6
-25
th(SD_A_MT)
Data output hold time
Master transmitter (after enable edge)
9
-
1. Guaranteed by characterization results.
2. 2.APB clock frequency must be at least twice SAI clock frequency.
Table 130. SAI characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Max
Unit
MS32771V1
SAI_SCK_X
SAI_FS_X
(output)
1/fSCK
SAI_SD_X
(transmit)
tv(FS)
Slot n
SAI_SD_X
(receive)
th(FS)
Slot n+2
tv(SD_MT)
th(SD_MT)
Slot n
tsu(SD_MR)
th(SD_MR)



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