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MCP39F511A Datasheet(PDF) 35 Page - Microchip Technology |
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MCP39F511A Datasheet(HTML) 35 Page - Microchip Technology |
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35 / 68 page ![]() 2018 Microchip Technology Inc. DS20006044A-page 35 MCP39F511A Each converter can be placed in Shutdown mode independently. This mode is only available through programming of the SHUTDOWN<1:0> bits in the System Configuration Register register. Note: The PHASE register can be used to serially Soft Reset the ADCs, without using the RESET bits in the Configuration register, if the same value is written in the PHASE register. REGISTER 6-2: SYSTEM CONFIGURATION REGISTER U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-1 R/W-1 — — PGA_CH1<2:0> PGA_CH0<2:0> bit 31 bit 24 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 23 bit 16 R/W-1 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 UART<2:0>1 ZCD_INV ZCD_PULS ZCD_OUTPUT_DIS — SINGLE_WIRE bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 TEMPCOMP RESET<1:0> SHUTDOWN<1:0> VREFEXT PWM_CNTRL ENRG_CNTRL bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 31-30 Unimplemented : Read as ‘0’ bit 29-27 PGA_CH1 <2:0>: PGA Setting for the voltage channel. 111 = Reserved (Gain = 1) 110 = Reserved (Gain = 1) 101 = Gain is 32 100 = Gain is 16 011 = Gain is 8 010 = Gain is 4 001 = Gain is 2 000 = Gain is 1 (Default) bit 26-24 PGA_CH0 <2:0>: PGA Setting for the current channel. 111 = Reserved (Gain = 1) 110 = Reserved (Gain = 1) 101 = Gain is 32 100 = Gain is 16 011 = Gain is 8 (Default) 010 = Gain is 4 001 = Gain is 2 000 = Gain is 1 bit 23-16 Unimplemented : Read as ‘0’ |
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