Electrical characteristics

STSAFE-A110

28/36

DS13039 Rev 1

5.4

AC characteristics

Table 6. AC characteristics

Name

Description

Min.

Typ.

Max.

Units

Reset rise and fall time

-

-

1

µs

Pulse width for Reset

1

-

-

µs

Table 7. I²C operating conditions

Name

Description

Standard mode

Fast mode

Units

Min.

Max.

Min.

Max.

SCL frequency of sub-device: processor

-

100

-

400

kHz

Input low to Clock low (Start condition

hold time)

4.0

-

0.6

-

µs

Low period of SCL clock

4.7

-

1.3

-

µs

High period of SCL clock

4.0

-

0.6

-

µs

Clock high to Input Transition / Setup time

for a (repeated) Start condition

See Note

4.7

-

0.6

-

µs

Clock low to Input transition

1. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the

undefined region of the falling edge of SCL.

(2)

must be valid by the setup time before it releases the clock.

0(1)

(2)

µs

Input transition to Clock transition Data

setup time

250

-

100

-

ns

Clock high to Input high (Stop)

4.0

-

0.6

-

µs

Input high to Input low (bus free between

stop and start)

4.7

-

1.3

-

µs

Clock and Data rise time on load

capacitance of 30 pF

-

1000

20

300

ns

Clock and Data fall time on load

capacitance of 30 pF

-

300

10

300

ns

Table 8. I²C filter characteristics

Symbol

Parameter

Min

Max

Unit

1. Guaranteed by design, not tested in production

Pulse width of spikes that are suppressed by filter

0

50

ns