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MPC5554 Datasheet(PDF) 1 Page - Freescale Semiconductor, Inc |
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MPC5554 Datasheet(HTML) 1 Page - Freescale Semiconductor, Inc |
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1 / 12 page ![]() © Freescale Semiconductor, Inc., 2005. All rights reserved. Freescale Semiconductor Product Brief MPC5554PB Rev. 2.1, 06/2005 Table of Contents The MPC5554 is the first member of a family of next generation microcontrollers based on the PowerPC ™ Book E architecture that enhances the PowerPC architecture’s fit in embedded applications. It is 100% user mode compatible (with floating point library) with the classic PowerPC instruction set. This document provides an overview of the MPC5554 microcontroller features, including the major functional components. The MPC5554 device’s on-chip modules include the following: • Single issue, 32-bit PowerPC Book E-compliant e200z6 CPU core complex • 64-channel enhanced direct memory access controller (eDMA) • Interrupt controller (INTC) capable of handling 286 selectable-priority interrupt sources • Frequency modulated phase-locked loop (FMPLL) • External bus interface (EBI) with error correction status module (ECSM) • System integration unit (SIU) 1 Block Diagram ..................................................... 3 2 Features .............................................................. 4 MPC5554 Microcontroller Product Brief |
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