G3R75MT12D

1200 V 75 mΩ SiC MOSFET

TM

Parameter

Symbol

Conditions

Values

Unit

Note

Min.

Typ.

Max.

Drain-Source Breakdown Voltage

V

V = 0 V, I = 100 µA

1200

V

Zero Gate Voltage Drain Current

I

V = 1200 V, V = 0 V

1

µA

Gate Source Leakage Current

I

V = 0 V, V = 20 V

100

nA

V = 0 V, V = -10 V

-100

Gate Threshold Voltage

V

V = V , I = 10.0 mA

1.8

2.70

V

Fig. 9

V = V , I = 10.0 mA, T = 175°C

2.05

Transconductance

g

V = 10 V, I = 20 A

9.0

S

Fig. 4

V = 10 V, I = 20 A, T = 175°C

10.1

Drain-Source On-State Resistance

R

V = 15 V, I = 20 A

75

97

mΩ

Fig. 5-8

V = 15 V, I = 20 A, T = 175°C

106

Input Capacitance

C

V = 800 V, V = 0 V

f = 1 MHz, V = 25mV

1545

pF

Fig. 11

Output Capacitance

C

46

Reverse Transfer Capacitance

C

3.8

C Stored Energy

E

18

µJ

Fig. 12

C Stored Charge

Q

68

nC

Effective Output Capacitance (Energy

Related)

C

56

pF

Note 2

Effective Output Capacitance (Time

Related)

C

85

Gate-Source Charge

Q

V = 800 V, V = -5 / +15 V

I = 20 A

Per IEC607478-4

15

nC

Fig. 10

Gate-Drain Charge

Q

16

Total Gate Charge

Q

47

Internal Gate Resistance

R

f = 1 MHz, V = 25 mV

1.3

Ω

Turn-On Switching Energy

(Body Diode)

E

T = 25°C, V = -5/+15V, R

= 8 Ω, L =

80.0 µH, I = 20 A, V = 800 V

217

µJ

Fig. 22,26

Turn-Off Switching Energy

(Body Diode)

E

52

Turn-On Delay Time

t

V = 800 V, V = -5/+15V

R

= 8 Ω, L = 80.0 µH, I = 20 A

Timing relative to V , Inductive load

39

ns

Fig. 24

Rise Time

t

15

Turn-Off Delay Time

t

18

Fall Time

t

10

*The chip technology was characterized up to 200 V/ns. The measured dV/dt was limited by measurement test setup and package.

Note 2: C , a lumped capacitance that gives same stored energy as C

while V is rising from 0 to 800V.

C , a lumped capacitance that gives same charging times as C

while V is rising from 0 to 800V.

C

DSS

GS

D

DSS

DS

GS

GSS

DS

GS

DS

GS

GS(th)

DS

GS D

DS

GS D

j

fs

DS

D

DS

D

j

DS(ON)

GS

D

GS

D

j

iss

DS

GS

AC

oss

rss

oss

oss

oss

oss

o(er)

o(tr)

gs

DS

GS

D

gd

g

G(int)

AC

On

j

GS

G(ext)

D

DD

Off

d(on)

DD

GS

G(ext)

D

DS

r

d(off)

f

o(er)

OSS

DS

o(tr)

OSS

DS

Rev 21/May

Latest Version at: www.genesicsemi.com/sic-mosfet/G3R75MT12D/G3R75MT12D.pdf

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